gpio.ls 2.6 KB

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  1. 1 ; C Compiler for STM8 (COSMIC Software)
  2. 2 ; Parser V4.8.32 - 23 Mar 2010
  3. 3 ; Generator V4.3.4 - 23 Mar 2010
  4. 2742 ; 3 void GPIO_INIT(void)
  5. 2742 ; 4 {
  6. 2744 switch .text
  7. 2745 0000 _GPIO_INIT:
  8. 2749 ; 6 PA_DDR |= DDR_1;
  9. 2751 0000 72125002 bset _PA_DDR,#1
  10. 2752 ; 7 PA_CR1 |= CR1_1;
  11. 2754 0004 72125003 bset _PA_CR1,#1
  12. 2755 ; 8 PA_CR2 |= CR2_1;
  13. 2757 0008 72125004 bset _PA_CR2,#1
  14. 2758 ; 10 PA_DDR |= DDR_2;
  15. 2760 000c 72145002 bset _PA_DDR,#2
  16. 2761 ; 11 PA_CR1 |= CR1_2;
  17. 2763 0010 72145003 bset _PA_CR1,#2
  18. 2764 ; 12 PA_CR2 |= CR2_2;
  19. 2766 0014 72145004 bset _PA_CR2,#2
  20. 2767 ; 14 PA_DDR |= DDR_3;
  21. 2769 0018 72165002 bset _PA_DDR,#3
  22. 2770 ; 15 PA_CR1 |= CR1_3;
  23. 2772 001c 72165003 bset _PA_CR1,#3
  24. 2773 ; 16 PA_CR2 |= CR2_3;
  25. 2775 0020 72165004 bset _PA_CR2,#3
  26. 2776 ; 18 PC_DDR |= DDR_5;
  27. 2778 0024 721a500c bset _PC_DDR,#5
  28. 2779 ; 19 PC_CR1 |= CR1_5;
  29. 2781 0028 721a500d bset _PC_CR1,#5
  30. 2782 ; 20 PC_CR2 |= CR2_5;
  31. 2784 002c 721a500e bset _PC_CR2,#5
  32. 2785 ; 42 PD_DDR |= 0xFF;
  33. 2787 0030 c65011 ld a,_PD_DDR
  34. 2788 0033 aaff or a,#255
  35. 2789 0035 c75011 ld _PD_DDR,a
  36. 2790 ; 43 PD_CR1 |= 0xFF;
  37. 2792 0038 c65012 ld a,_PD_CR1
  38. 2793 003b aaff or a,#255
  39. 2794 003d c75012 ld _PD_CR1,a
  40. 2795 ; 44 PD_CR2 |= 0xFF;
  41. 2797 0040 c65013 ld a,_PD_CR2
  42. 2798 0043 aaff or a,#255
  43. 2799 0045 c75013 ld _PD_CR2,a
  44. 2800 ; 47 COLD = 0;
  45. 2802 0048 7219500f bres _COLD
  46. 2803 ; 48 HEAT = 0;
  47. 2805 004c 7213500f bres _HEAT
  48. 2806 ; 49 COLLECT_FAN = 0;
  49. 2808 0050 72135000 bres _COLLECT_FAN
  50. 2809 ; 50 COOL = 0;
  51. 2811 0054 72155000 bres _COOL
  52. 2812 ; 51 REST = 1;
  53. 2814 0058 72165000 bset _REST
  54. 2815 ; 52 TURN = 0;
  55. 2817 005c 721b500a bres _TURN
  56. 2818 ; 55 }
  57. 2821 0060 81 ret
  58. 2834 xdef _GPIO_INIT
  59. 2853 end