adc.ls 4.3 KB

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  1. 1 ; C Compiler for STM8 (COSMIC Software)
  2. 2 ; Parser V4.8.32 - 23 Mar 2010
  3. 3 ; Generator V4.3.4 - 23 Mar 2010
  4. 2468 ; 18 void ADC_INIT()
  5. 2468 ; 19 {
  6. 2470 switch .text
  7. 2471 0000 _ADC_INIT:
  8. 2475 ; 21 CLK_PCKENR2 |=0x08;
  9. 2477 0000 721650ca bset _CLK_PCKENR2,#3
  10. 2478 ; 23 ADC_CR1 = 0x00;
  11. 2480 0004 725f5401 clr _ADC_CR1
  12. 2481 ; 25 ADC_CR2 = 0x08;
  13. 2483 0008 35085402 mov _ADC_CR2,#8
  14. 2484 ; 27 ADC_CR3 = 0x00;
  15. 2486 000c 725f5403 clr _ADC_CR3
  16. 2487 ; 30 ADC_TDRH = 0x00;
  17. 2489 0010 725f5406 clr _ADC_TDRH
  18. 2490 ; 31 ADC_TDRL = 0x00;
  19. 2492 0014 725f5407 clr _ADC_TDRL
  20. 2493 ; 32 }
  21. 2496 0018 81 ret
  22. 2560 ; 39 unsigned int getADCValue(unsigned char channel){
  23. 2561 switch .text
  24. 2562 0019 _getADCValue:
  25. 2564 0019 88 push a
  26. 2565 001a 5204 subw sp,#4
  27. 2566 00000004 OFST: set 4
  28. 2569 ; 41 unsigned int tmp = 0;
  29. 2571 001c 5f clrw x
  30. 2572 001d 1f01 ldw (OFST-3,sp),x
  31. 2573 ; 42 unsigned int j = 60,i;
  32. 2575 ; 44 ADC_CSR &=0xF0;
  33. 2577 001f c65400 ld a,_ADC_CSR
  34. 2578 0022 a4f0 and a,#240
  35. 2579 0024 c75400 ld _ADC_CSR,a
  36. 2580 ; 46 if(channel < 16){
  37. 2582 0027 7b05 ld a,(OFST+1,sp)
  38. 2583 0029 a110 cp a,#16
  39. 2584 002b 244b jruge L3361
  40. 2585 ; 48 ADC_CSR |= channel;
  41. 2587 002d c65400 ld a,_ADC_CSR
  42. 2588 0030 1a05 or a,(OFST+1,sp)
  43. 2589 0032 c75400 ld _ADC_CSR,a
  44. 2590 ; 50 ADC_CR1 |= 0x01;
  45. 2592 0035 72105401 bset _ADC_CR1,#0
  46. 2593 ; 52 j = 60;
  47. 2595 0039 ae003c ldw x,#60
  48. 2596 003c 1f03 ldw (OFST-1,sp),x
  49. 2597 ; 53 tmp = 0;
  50. 2599 003e 5f clrw x
  51. 2600 003f 1f01 ldw (OFST-3,sp),x
  52. 2602 0041 L1461:
  53. 2603 ; 54 while(j--);
  54. 2605 0041 1e03 ldw x,(OFST-1,sp)
  55. 2606 0043 1d0001 subw x,#1
  56. 2607 0046 1f03 ldw (OFST-1,sp),x
  57. 2608 0048 1c0001 addw x,#1
  58. 2609 004b a30000 cpw x,#0
  59. 2610 004e 26f1 jrne L1461
  60. 2611 ; 56 for(i=0;i<10;i++) {
  61. 2613 0050 5f clrw x
  62. 2614 0051 1f03 ldw (OFST-1,sp),x
  63. 2615 0053 L5461:
  64. 2616 ; 59 ADC_CR1 |= 0x01;
  65. 2618 0053 72105401 bset _ADC_CR1,#0
  66. 2620 0057 L5561:
  67. 2621 ; 61 while((ADC_CSR & 0x80) == 0);
  68. 2623 0057 c65400 ld a,_ADC_CSR
  69. 2624 005a a580 bcp a,#128
  70. 2625 005c 27f9 jreq L5561
  71. 2626 ; 63 ADC_CSR &= (~0x80);
  72. 2628 005e 721f5400 bres _ADC_CSR,#7
  73. 2629 ; 65 tmp += *((uint *)&ADC_DRH);
  74. 2631 0062 1e01 ldw x,(OFST-3,sp)
  75. 2632 0064 72bb5404 addw x,_ADC_DRH
  76. 2633 0068 1f01 ldw (OFST-3,sp),x
  77. 2634 ; 56 for(i=0;i<10;i++) {
  78. 2636 006a 1e03 ldw x,(OFST-1,sp)
  79. 2637 006c 1c0001 addw x,#1
  80. 2638 006f 1f03 ldw (OFST-1,sp),x
  81. 2641 0071 1e03 ldw x,(OFST-1,sp)
  82. 2642 0073 a3000a cpw x,#10
  83. 2643 0076 25db jrult L5461
  84. 2644 0078 L3361:
  85. 2645 ; 77 ADC_CR1 &= ~0x01;
  86. 2647 0078 72115401 bres _ADC_CR1,#0
  87. 2648 ; 80 return tmp/10;
  88. 2650 007c 1e01 ldw x,(OFST-3,sp)
  89. 2651 007e 90ae000a ldw y,#10
  90. 2652 0082 65 divw x,y
  91. 2655 0083 5b05 addw sp,#5
  92. 2656 0085 81 ret
  93. 2681 xdef _getADCValue
  94. 2682 xdef _ADC_INIT
  95. 2683 switch .ubsct
  96. 2684 0000 _adcvalue:
  97. 2685 0000 000000000000 ds.b 20
  98. 2686 xdef _adcvalue
  99. 2706 end