timer2.ls 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172
  1. 1 ; C Compiler for STM8 (COSMIC Software)
  2. 2 ; Parser V4.8.32 - 23 Mar 2010
  3. 3 ; Generator V4.3.4 - 23 Mar 2010
  4. 2743 ; 5 void TIM2_INIT(void)
  5. 2743 ; 6 {
  6. 2745 switch .text
  7. 2746 0000 _TIM2_INIT:
  8. 2750 ; 8 TURN_OUT_DDR = 1;//1: 输出模式
  9. 2752 0000 721a500c bset _TURN_OUT_DDR
  10. 2753 ; 9 TURN_OUT_CR1 = 1;//1:推挽输出,
  11. 2755 0004 721a500d bset _TURN_OUT_CR1
  12. 2756 ; 10 TURN_OUT_CR2 = 1;//1:输出速度最大为10MHZ
  13. 2758 0008 721a500e bset _TURN_OUT_CR2
  14. 2759 ; 11 TURN_OUT_ODR = 0;
  15. 2761 000c 721b500a bres _TURN_OUT_ODR
  16. 2762 ; 14 CLK_PCKENR1 |= 0x20;
  17. 2764 0010 721a50c7 bset _CLK_PCKENR1,#5
  18. 2765 ; 16 TIM2_PSCR = 0x00; //定时器2预分频系数为1
  19. 2767 0014 725f530e clr _TIM2_PSCR
  20. 2768 ; 19 TIM2_ARRH = 0x03;//0320,10K
  21. 2770 0018 3503530f mov _TIM2_ARRH,#3
  22. 2771 ; 20 TIM2_ARRL = 0x20;//
  23. 2773 001c 35205310 mov _TIM2_ARRL,#32
  24. 2774 ; 22 TIM2_CCMR1 |= 0X68;
  25. 2776 0020 c65307 ld a,_TIM2_CCMR1
  26. 2777 0023 aa68 or a,#104
  27. 2778 0025 c75307 ld _TIM2_CCMR1,a
  28. 2779 ; 23 TIM2_CCER1 |= 0x01; //开启OC1信号输出脚--高电平有效
  29. 2781 0028 7210530a bset _TIM2_CCER1,#0
  30. 2782 ; 37 TIM2_CCR1H = 0x03; //占空比 40%
  31. 2784 002c 35035311 mov _TIM2_CCR1H,#3
  32. 2785 ; 38 TIM2_CCR1L = 0x20;
  33. 2787 0030 35205312 mov _TIM2_CCR1L,#32
  34. 2788 ; 43 TIM2_CR1 = 0x00;
  35. 2790 0034 725f5300 clr _TIM2_CR1
  36. 2791 ; 44 }
  37. 2794 0038 81 ret
  38. 2830 ; 46 void TIM2_PWM(char v)
  39. 2830 ; 47 {
  40. 2831 switch .text
  41. 2832 0039 _TIM2_PWM:
  42. 2836 ; 48 switch(v)
  43. 2839 ; 60 default:
  44. 2839 ; 61 break;
  45. 2840 0039 4d tnz a
  46. 2841 003a 270d jreq L3371
  47. 2842 003c 4a dec a
  48. 2843 003d 2612 jrne L7571
  49. 2844 ; 50 case 1:
  50. 2844 ; 51 //CLK_PCKENR1 |= 0x20;
  51. 2844 ; 52 TIM2_CCER1 |= 0x01;//开启OC1信号输出脚--低电平有效
  52. 2846 003f 7210530a bset _TIM2_CCER1,#0
  53. 2847 ; 53 TIM2_CR1 = 0x01;
  54. 2849 0043 35015300 mov _TIM2_CR1,#1
  55. 2850 ; 54 break;
  56. 2852 0047 2008 jra L7571
  57. 2853 0049 L3371:
  58. 2854 ; 55 case 0:
  59. 2854 ; 56 TIM2_CR1 = 0x00;
  60. 2856 0049 725f5300 clr _TIM2_CR1
  61. 2857 ; 57 TIM2_CCER1 &= ~0x01;
  62. 2859 004d 7211530a bres _TIM2_CCER1,#0
  63. 2860 ; 59 break;
  64. 2862 0051 L5371:
  65. 2863 ; 60 default:
  66. 2863 ; 61 break;
  67. 2865 0051 L7571:
  68. 2866 ; 63 }
  69. 2869 0051 81 ret
  70. 2882 xdef _TIM2_PWM
  71. 2883 xdef _TIM2_INIT
  72. 2902 end