#ifndef __IIC_H__ #define __IIC_H__ #include "common.h" /** @addtogroup I2C_Registers_Bits_Definition * @{ */ #define SLAVE_ADDRESS 0x51 /*!< Define Slave Address */ #define I2C_CR1_NOSTRETCH ((uchar)0x80) /*!< Clock Stretching Disable (Slave mode) */ #define I2C_CR1_ENGC ((uchar)0x40) /*!< General Call Enable */ #define I2C_CR1_PE ((uchar)0x01) /*!< Peripheral Enable */ #define I2C_CR2_SWRST ((uchar)0x80) /*!< Software Reset */ #define I2C_CR2_POS ((uchar)0x08) /*!< Acknowledge */ #define I2C_CR2_ACK ((uchar)0x04) /*!< Acknowledge Enable */ #define I2C_CR2_STOP ((uchar)0x02) /*!< Stop Generation */ #define I2C_CR2_START ((uchar)0x01) /*!< Start Generation */ #define I2C_FREQR_FREQ ((uchar)0x3F) /*!< Peripheral Clock Frequency */ #define I2C_OARL_ADD ((uchar)0xFE) /*!< Interface Address bits [7..1] */ #define I2C_OARL_ADD0 ((uchar)0x01) /*!< Interface Address bit0 */ #define I2C_OARH_ADDMODE ((uchar)0x80) /*!< Addressing Mode (Slave mode) */ #define I2C_OARH_ADDCONF ((uchar)0x40) /*!< Address Mode Configuration */ #define I2C_OARH_ADD ((uchar)0x06) /*!< Interface Address bits [9..8] */ #define I2C_DR_DR ((uchar)0xFF) /*!< Data Register */ #define I2C_SR1_TXE ((uchar)0x80) /*!< Data Register Empty (transmitters) */ #define I2C_SR1_RXNE ((uchar)0x40) /*!< Data Register not Empty (receivers) */ #define I2C_SR1_STOPF ((uchar)0x10) /*!< Stop detection (Slave mode) */ #define I2C_SR1_ADD10 ((uchar)0x08) /*!< 10-bit header sent (Master mode) */ #define I2C_SR1_BTF ((uchar)0x04) /*!< Byte Transfer Finished */ #define I2C_SR1_ADDR ((uchar)0x02) /*!< Address sent (master mode)/matched (slave mode) */ #define I2C_SR1_SB ((uchar)0x01) /*!< Start Bit (Master mode) */ #define I2C_SR2_WUFH ((uchar)0x20) /*!< Wake-up from Halt */ #define I2C_SR2_OVR ((uchar)0x08) /*!< Overrun/Underrun */ #define I2C_SR2_AF ((uchar)0x04) /*!< Acknowledge Failure */ #define I2C_SR2_ARLO ((uchar)0x02) /*!< Arbitration Lost (master mode) */ #define I2C_SR2_BERR ((uchar)0x01) /*!< Bus Error */ #define I2C_SR3_GENCALL ((uchar)0x10) /*!< General Call Header (Slave mode) */ #define I2C_SR3_TRA ((uchar)0x04) /*!< Transmitter/Receiver */ #define I2C_SR3_BUSY ((uchar)0x02) /*!< Bus Busy */ #define I2C_SR3_MSL ((uchar)0x01) /*!< Master/Slave */ #define I2C_ITR_ITBUFEN ((uchar)0x04) /*!< Buffer Interrupt Enable */ #define I2C_ITR_ITEVTEN ((uchar)0x02) /*!< Event Interrupt Enable */ #define I2C_ITR_ITERREN ((uchar)0x01) /*!< Error Interrupt Enable */ #define I2C_CCRL_CCR ((uchar)0xFF) /*!< Clock Control Register (Master mode) */ #define I2C_CCRH_FS ((uchar)0x80) /*!< Master Mode Selection */ #define I2C_CCRH_DUTY ((uchar)0x40) /*!< Fast Mode Duty Cycle */ #define I2C_CCRH_CCR ((uchar)0x0F) /*!< Clock Control Register in Fast/Standard mode (Master mode) bits [11..8] */ #define I2C_TRISER_TRISE ((uchar)0x3F) /*!< Maximum Rise Time in Fast/Standard mode (Master mode) */ //I2C的缓冲区最大值 #define I2C_MAX_SIZE 32 void IIC_Init(void); #endif