drv_clk.c 2.7 KB

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  1. /*
  2. * Copyright (c) 2006-2019, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-10-26 ChenYong first version
  9. * 2020-01-08 xiangxistu add HSI configuration
  10. */
  11. #include <rtthread.h>
  12. #include <stm32g0xx.h>
  13. #include <board.h>
  14. #include "drv_common.h"
  15. #define DBG_TAG "board"
  16. #define DBG_LVL DBG_INFO
  17. #include <rtdbg.h>
  18. void system_clock_config(int target_freq_Mhz)
  19. {
  20. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  21. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  22. RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  23. /** Configure the main internal regulator output voltage
  24. */
  25. HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
  26. /** Configure LSE Drive Capability
  27. */
  28. HAL_PWR_EnableBkUpAccess();
  29. __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
  30. /** Initializes the RCC Oscillators according to the specified parameters
  31. * in the RCC_OscInitTypeDef structure.
  32. */
  33. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
  34. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  35. RCC_OscInitStruct.LSEState = RCC_LSE_ON;
  36. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  37. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  38. RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
  39. RCC_OscInitStruct.PLL.PLLN = 16;
  40. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  41. RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
  42. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  43. {
  44. Error_Handler();
  45. }
  46. /** Initializes the CPU, AHB and APB buses clocks
  47. */
  48. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1;
  49. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  50. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  51. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  52. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  53. {
  54. Error_Handler();
  55. }
  56. /** Initializes the peripherals clocks
  57. */
  58. PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART1;
  59. PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1;
  60. PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
  61. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  62. {
  63. Error_Handler();
  64. }
  65. }
  66. int clock_information(void)
  67. {
  68. LOG_D("System Clock information");
  69. LOG_D("SYSCLK_Frequency = %d", HAL_RCC_GetSysClockFreq());
  70. LOG_D("HCLK_Frequency = %d", HAL_RCC_GetHCLKFreq());
  71. LOG_D("PCLK1_Frequency = %d", HAL_RCC_GetPCLK1Freq());
  72. return RT_EOK;
  73. }
  74. INIT_BOARD_EXPORT(clock_information);
  75. void clk_init(char *clk_source, int source_freq, int target_freq)
  76. {
  77. system_clock_config(target_freq);
  78. }