sync: 2026-09-30 11:51:56

.gitignore

@@ -0,0 +1,8 @@
+# >>> autogit >>>
+# 由 autogit 自动维护：这些文件含本机路径与访问令牌，绝不能入库。
+autogit.bat
+autogit.json
+autogit.json.example
+autogit.log
+autogit.py
+# <<< autogit <<<

Application_SY2/.gitignore

@@ -0,0 +1 @@
+/Debug/

Application_SY2/.project

@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+  <name>Application_CBD</name>
+  <comment />
+  <projects>
+	</projects>
+  <buildSpec>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+      <triggers>clean,full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+      <triggers>full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+  </buildSpec>
+  <natures>
+    <nature>org.eclipse.cdt.core.cnature</nature>
+    <nature>org.rt-thread.studio.rttnature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+  </natures>
+  <linkedResources />
+</projectDescription>

Application_SY2/.settings/Application_BZY.STLink.Debug.rttlaunch

@@ -0,0 +1,51 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="ST-LINK"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${rtt_svd_path}/STM32F101xx.svd"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.connectMode" value="NORMAL"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.debugInterface" value="SWD"/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.flashVerify" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="org.eclipse.cdt.debug.gdbjtag.core.jtagdevice.genericDevice"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.otherDownloadOption" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.otherGdbserverOption" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="61235"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.resetMode" value=" -hardRst"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.resetRun" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${rtt_gnu_gcc}/arm-none-eabi-gdb.exe"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="Application_BZY"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/Application_BZY"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
+</launchConfiguration>

Application_SY2/.settings/ilg.gnumcueclipse.managedbuild.cross.arm.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+toolchain.path.1287942917=${toolchain_install_path}/ARM/GNU_Tools_for_ARM_Embedded_Processors/6.3.1/bin

Application_SY2/.settings/language.settings.xml

@@ -0,0 +1,14 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-114648885206814407" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>

Application_SY2/.settings/local_temp_storage.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+temp.toolchain.exec.path=D\:\\RT-ThreadStudio\\repo\\Extract\\ToolChain_Support_Packages\\ARM\\GNU_Tools_for_ARM_Embedded_Processors\\6.3.1/bin

Application_SY2/.settings/org.eclipse.cdt.codan.core.prefs

@@ -0,0 +1,73 @@
+eclipse.preferences.version=1
+org.eclipse.cdt.codan.checkers.errnoreturn=-Warning
+org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false}
+org.eclipse.cdt.codan.checkers.errreturnvalue=-Error
+org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"}
+org.eclipse.cdt.codan.checkers.nocommentinside=-Error
+org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Nesting comments\\")"}
+org.eclipse.cdt.codan.checkers.nolinecomment=-Error
+org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Line comments\\")"}
+org.eclipse.cdt.codan.checkers.noreturn=-Error
+org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return value\\")",implicit\=>false}
+org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation=-Error
+org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Abstract class cannot be instantiated\\")"}
+org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Ambiguous problem\\")"}
+org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment in condition\\")"}
+org.eclipse.cdt.codan.internal.checkers.AssignmentToItselfProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.AssignmentToItselfProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment to itself\\")"}
+org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No break at end of case\\")",no_break_comment\=>"no break",last_case_param\=>false,empty_case_param\=>false,enable_fallthrough_quickfix_param\=>false}
+org.eclipse.cdt.codan.internal.checkers.CatchByReference=-Warning
+org.eclipse.cdt.codan.internal.checkers.CatchByReference.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Catching by reference is recommended\\")",unknown\=>false,exceptions\=>()}
+org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Circular inheritance\\")"}
+org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization=-Warning
+org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class members should be properly initialized\\")",skip\=>true}
+org.eclipse.cdt.codan.internal.checkers.DecltypeAutoProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.DecltypeAutoProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid 'decltype(auto)' specifier\\")"}
+org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"\u5B57\u6BB5\u65E0\u6CD5\u88AB\u89E3\u6790\\")"}
+org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"\u51FD\u6570\u65E0\u6CD5\u88AB\u89E3\u6790\\")"}
+org.eclipse.cdt.codan.internal.checkers.InvalidArguments=-Error
+org.eclipse.cdt.codan.internal.checkers.InvalidArguments.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"\u65E0\u6548\u53C2\u6570\\")"}
+org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid template argument\\")"}
+org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Label statement not found\\")"}
+org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Member declaration not found\\")"}
+org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"\u65B9\u6CD5\u65E0\u6CD5\u88AB\u89E3\u6790\\")"}
+org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker=-Info
+org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Name convention for function\\")",pattern\=>"^[a-z]",macro\=>true,exceptions\=>()}
+org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class has a virtual method and non-virtual destructor\\")"}
+org.eclipse.cdt.codan.internal.checkers.OverloadProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid overload\\")"}
+org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redeclaration\\")"}
+org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redefinition\\")"}
+org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"}
+org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"}
+org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Statement has no effect\\")",macro\=>true,exceptions\=>()}
+org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suggested parenthesis around expression\\")",paramNot\=>false}
+org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suspicious semicolon\\")",else\=>false,afterelse\=>false}
+org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Type cannot be resolved\\")"}
+org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true}
+org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"\u672A\u4F7F\u7528\u7684\u9759\u6001\u51FD\u6570\\")",macro\=>true}
+org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")}
+org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"}

Application_SY2/.settings/org.eclipse.core.resources.prefs

@@ -0,0 +1,8 @@
+autoUpdatePkgs=false
+eclipse.preferences.version=1
+encoding//applications/control.c=UTF-8
+encoding//applications/control.h=UTF-8
+encoding//applications/hmi.c=UTF-8
+encoding//applications/main.c=UTF-8
+encoding//rt-thread/src/kservice.c=GB2312
+encoding/<project>=UTF-8

Application_SY2/.settings/org.eclipse.core.runtime.prefs

@@ -0,0 +1,3 @@
+content-types/enabled=true
+content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
+eclipse.preferences.version=1

Application_SY2/.settings/org.eclipse.ltk.core.refactoring.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false

Application_SY2/.settings/projcfg.ini

@@ -0,0 +1,9 @@
+#RT-Thread Studio Project Configuration
+#Fri Sep 19 17:06:07 CST 2025
+mcu_name=STM32F103RETX
+output_project_path=C\:\\Users\\yfkj-yfb\\Desktop\\cache\\SY
+hardware_adapter=ST-LINK
+selected_rtt_version=v4.0.2
+mcu_base_nano_proj=false
+project_base_bsp=false
+cfg_version=v2.0

Application_SY2/.vscode/settings.json

@@ -0,0 +1,8 @@
+{
+    "git.ignoreLimitWarning": true,
+    "files.associations": {
+        "cjson.h": "c",
+        "dma_config.h": "c",
+        "stm32f1xx_hal.h": "c"
+    }
+}

Application_SY2/.workbuddy/memory/2026-07-16.md

@@ -0,0 +1,26 @@
+# 2026-07-16
+
+## 温控逻辑 Bug 修复 (Work_SY2.c → Check_Allow_Work)
+
+修复了 `Check_Allow_Work()` 函数中温控逻辑的 3 个 bug：
+
+### Bug 1: `char temp` 类型溢出
+- 原因：`sensor[s_Temp].value` 是 `int32_t`，485 传感器 0.1°C 分辨率下 25.0°C 对应 raw=250，`char` (signed 8-bit) 只能存 -128~127，导致溢出
+- 修复：改为 `int32_t temp`
+
+### Bug 2: 上限判断条件错误
+- 原因：上限块使用了 `temp < limit.temp_dw * 10`（比较下限值 + 小于号），与下限块完全相同
+- 修复：改为 `temp > limit.temp_up * 10`（温度超过上限才触发）
+
+### Bug 3: 冗余条件
+- `sensor[s_Temp].online >= 1 && sensor[s_Temp].online >= 1` 重复判断，删除了重复项
+
+### 正确逻辑
+- 正常工作区间：`temp_dw * 10 <= temp <= temp_up * 10`
+- 超出上限 → 触发温控上限 (temp_status=1)
+- 低于下限 → 触发温控下限 (temp_status=2)
+- 默认值：temp_up=50°C (raw=500)，temp_dw=10°C (raw=100)
+
+### Bug 4: 下限去抖计数器触发后错误重置
+- 原因：下限触发后 `temp_dn_cnt = 0` 导致计数器清零，后续即使温度仍低于下限，也需要重新累积 20 次才能再次触发（脉冲式保护，每 20s 只保护 1s）
+- 修复：删除 `temp_dn_cnt = 0`，与上限逻辑保持一致（触发后 latch 住，条件持续满足则每次立即返回 res_Temp）

Application_SY2/.workbuddy/memory/2026-09-07.md

@@ -0,0 +1,10 @@
+# 2026-09-07 工作日志
+
+## 色诱2.0 交互协议 V0.3 → V0.4 更新
+- 背景：设备拍照机制由「时控时段内按 PHO_T(分钟) 间隔连续拍照」改为「间隔 N 天 + 指定 HH:MM 定点拍照一次」，固件已改但协议文档未同步。
+- 依据代码核对（Application_SY2）：
+  - 状态/数据上报包 `makeJson_NEW()`：已不再上报 PHO_T/START_TIME/END_TIME/TT；新增 `PHO_INR_DAY/PHO_T_HOUR/PHO_T_MIN`（均字符串），与 DATT/CONTROL/TEMP_* 同帧。
+  - 拍照触发 `Check_Photo_Trigger()`：基点=上次拍照完成当天 00:00，+N 天 +HH:MM 触发；参数范围 N:1~7（默认1天 21:00），时0~23，分0~59；非法/全0 开机回默认。`Check_Photo_Near()` 提前 300s 保持 RTU 上电。
+  - 下发：真正写入新参数的只有 `{"cmd":"paramconf","ext":{...}}` 分支（dtu_uart2.c），成功回执=主动上报完整状态包；protocol.c 的 COMMAND:0008(exe_dev_setpara) 只解析根级 CONTROL/START_TIME/END_TIME/PHO_T/DATT，不写新字段（兼容遗留）。
+- 产出：`E:\归档文件\11. 色诱2.0\1. 项目需求梳理\协议\色诱监测设备与平台端交互协议_260907-V0.4.md`（原 V0.3 md 未改动）。全表带 释义/类型/取值范围/变更标记（新增/修改/废弃/原有）。
+- 用户确认：下发按 paramconf 格式文档化；状态包旧字段移除并标注废弃。

Application_SY2/.workbuddy/memory/2026-09-30.md

@@ -0,0 +1,150 @@
+# 2026-09-30 工作日志
+
+## 排查：设 PHO_INR_DAY=1 / 09:30 但设备不拍照（只能 MQTT 远程）
+- 现场数据：工作模式=时控间隔模式；时控时间=20-4；当前状态="未在工作 1 "；照片间隔="1天 09:30"；
+  当前时间 09:44；卷带计数="90-85"；REMAIN=85。
+- **根因（已定，代码级）**：拍照触发检查 `Check_Photo_Trigger()` 只挂在"允许工作"的循环里 ——
+  - `Work_SY2.c:1109` `while (Check_Allow_Work() != res_ok)` 待机分支 **无**任何拍照检查；
+  - `Work_SY2.c:1126` 进入 `while (Check_Allow_Work() == res_ok)` 后才走 STEP2；
+  - `Work_SY2.c:1147` `if (Check_Photo_Trigger())` 在 STEP2 内。
+  故：**拍照时刻若落在时控窗口外，永远不会被执行**。本例 09:30 在 [20:00,04:00) 之外。
+- 佐证链：
+  - `workmode` 判定 `Work_SY2.c:243-245`（en_tigmode==0 → RunTime_wx）；
+  - 跨0点窗口判定 `control.c:2901`（`hour>=eh1 && hour<sh1` → tl_Front）→ `Check_Allow_Work()` 返回 res_Time(=1)，与上报"未在工作 1"数值吻合（拼装 `Work_SY2.c:1478`）；
+  - 参数本身没丢：上报字段直读 syscfg `protocol.c:221-226`；下发保存 `dtu_uart2.c:2075`；
+  - `Check_Photo_Trigger()` 是惰性判定（`now >= target` 即触发，`Work_SY2.c:818-828`），
+    故实际行为 = **每个工作窗口一进入（20:00）就立刻拍一张**，设定 09:30 形同虚设；
+  - 退出窗口的补拍 `Work_SY2.c:1200` 只在 `last_once==0` 时生效，20:00 已拍过 ⇒ 04:00 退出不补。
+- 关键远程观测点：ext 的 `卷带计数` = `RTC_GET_TigVal()`（已拍张数，RTC 后备域）`-` `Get_REMAIN()`（剩余百分比）
+  （拼装 `Work_SY2.c:1497`；`Get_REMAIN` 实现 `test.c:2095`）。**每拍一张第一项 +1**，是判断"到底拍没拍"的唯一远程硬证据。
+- 遗留待定（需若风定语义）：拍照触发是否应受时控窗口约束？当前实现为"受约束"，但参数允许设 0~23 任意整点 ⇒ 逻辑不匹配。
+  候选：A) 待机分支也轮询（拍照成独立唤醒源，需自管 RTU/CAM 上电）；B) 平台侧限制拍照时刻必须落在窗口内。
+- 注：`tm_to_timestamp()`（`test.c:796`）按"本地时间当 1970 起"计算，无时区偏移 ⇒ `Get_Photo_Target()` 的
+  `last % 86400` 确实是本地 00:00，**此处无时区 bug**（已核实，勿误判）。
+
+## 补充现场（09:50 若风回传）
+- ecode 记录：`(28-6) 6 秒前设备重启` @ 09/30 **08:26:20**（当天重启过）；
+  `(37-0) 进入手动触发模式` @ 09:42:26；`(22-0) 立即拍照测试开始` @ 09:44:03；
+  `(44-9) 触发拍照-9` @ 09:44:36。
+- ecode 码值对照（`test.h:56-108` 顺序，e_reboot=1 起算）：28=`e_Reboot`、37=`e_manual_mode`、
+  22=`e_TakePhoto`、44=`e_Hk_Take_io`。⇒ 09:44 那次**手动立即拍照确实跑到触发**（`test.c:565 Hk_Take_io(9)`）。
+- ⚠ 注意：测试类记录传的是 `JD_Test_Type`（如 `(4-0/4-2) 翻板测试` 中 4=`tt_fb_test`），
+  与 `ecode_list` 混用同一 code 字段 —— 读 ecode 时需按来源区分。
+
+## 需求落地：拍照彻底脱离时控窗口 + Read_status 可诊断（VERSION D045 → D046）
+**需求**：取消时控窗口对拍照的限制，只看 `PHO_INR_DAY` + `PHO_T_HOUR:PHO_T_MIN`（如 1天 + 09:30 ⇒ 每天 09:30 拍）；
+且 `{"cmd":"ctrl","ext":{"RC":"Read_status"}}` 要能看到"为什么没拍 / 拍了失败"。
+
+**改动（4 个文件）**：
+1. `control.h`：
+   - `VERSION_NUM` D045 → **D046**（功能变更 +1）
+   - 新增 `Photo_Stat_t {tig_tm, res_tm, res, io_type}` + `extern Photo_Stat_t photo_stat;`
+     （res: 0-无 / 1-成功 / 2-失败(图像超时) / 3-未执行(相机忙) / 4-进行中）
+2. `control.c` · `Hk_Take_io()`：定义 `photo_stat`；入口记 `tig_tm`+res=4，成功记 res=1、超时记 res=2，
+     相机忙记 res=3；**修掉既有缺陷** `if (CamFree==0) return;` → `return res_Error;`（原为裸 return，
+     返回值未定义，会让"拍照结果"上报失真）
+3. `Work_SY2.c`：
+   - 新增 `Photo_Tm_Str()`：Unix 秒 → "MM-DD HH:MM:SS"（与 `tm_to_timestamp` 同时基）
+   - 新增 `Photo_Block_Reason()`：硬安全拦截原因（设备已关机/演示模式/手动触发模式/电池保护）
+   - 新增 `Photo_Pkg_OnStandby()`：待机分支独立拍照 —— 到点即 `ctr_RTU_DTU(ON)+CTL_CAM1()+ctr_led(ON)`
+     → 等 45s → 重置 `tm_photo` → `work_mode_pkg()` → 下电 `ctr_RTU_DTU(OFF)+CTL_CAM0()+ctr_led(OFF)`；
+     **被拦截时不重置基点**，条件解除后自动补拍
+   - 待机循环 `while (Check_Allow_Work() != res_ok)` 内新增 `Photo_Pkg_OnStandby()` 调用
+   - `Updata_INR` 断电保护放开窗口门槛：`Check_Photo_Near() && Check_Allow_Work()==res_ok` → 仅 `Check_Photo_Near()`
+   - `status_Pri()`（Read_status）新增 5 个诊断字段：`拍照基点` / `下次拍照` / `距拍照` / `上次拍照` / `拍照拦截`
+   - 补 `extern void CTL_CAM0(void);`（该函数本文件 1356/1803 已在调用却无声明，既有缺陷）
+
+**验证**：ARM GCC 14.2 用工程真实 subdir.mk 参数跑 `-fsyntax-only`，**零新增诊断**
+（残留 9 条均为既有：`Mtor_Control_CM`/`EXE_NTP_SETTIME`/`Get_REMAIN`/`Updata_INR_Simple`/`WorkTask_SY2`
+未声明、`tig_cnt` 未用、`rt_pin_attach_irq` 回调签名不符、`%d` 配 `uint32_t`、`ef_set_env_blob` volatile）。
+注意：Eclipse 构建还有额外宏，`-fsyntax-only` 会报 signal.h/sigval 重定义等环境噪声，需过滤。
+
+**遗留**：`Work_SY2.c` 里 `Mtor_Control_CM` / `EXE_NTP_SETTIME` 仍是隐式声明（既有，未动，等若风定夺）。
+
+## 需求落地 2：拍照基点规则收敛 + RTC备份寄存器持久化（同一批，版本仍 D046）
+**若风要求**：① 基点只在"工作模式里拍照"时更新，手动触发不得更新；② 基点存 RTC 备份寄存器，重启不丢。
+
+**核查后的事实（与他的印象有出入，已当面摆清）**：
+- `tm_photo` 原持久化方式是 **EasyFlash ENV**（`ef_set_env_blob("tm_photo", ...)`），**不是** RTC 备份寄存器；
+  从未用 BKP 存过 tm_photo（08-28 那次改动就是 static 内存变量 → ENV）。
+- `RTC_GET_TigVal` / `RTC_SET_TigVal`（test.c:2077/2087）**名字叫 RTC，实现也是 ENV**（`read_cnt` 键）；
+  它们的 BKP 实现行 `BSP_Write_RTC_Reg(RayTigCnt_DR2, ...)` / `BSP_Read_RTC_Reg(...)` **已被注释掉**
+  （test.c:2080 / 2091）⇒ 项目早先已把卷带计数从 BKP 迁到 ENV。
+- 手动/测试拍照路径（按键、MQTT `takephoto`、一键测试、`jts.takephoto_test`）**本来就不调用**
+  `recode_timestampe_NEW(&tm_photo)` ⇒ 要求① 现状已满足，本轮改为"显式可执行约束"（防未来误用）。
+
+**BSP 层限制（重要，别再踩）**：
+- STM32F1 的 RTC 备份寄存器为 **16 位**，`BSP_Write_RTC_Reg` 只实现了 `Reg_Low_16` 分支；
+  `Reg_High_16` 与 `Reg_All` **全被注释掉**（test.c:1992-2003 / 1924-1933）⇒ **32 位值必须拆两个寄存器各写低16位**。
+- `BSP_Read_RTC_Reg(Reg_Low_16)` 返回低16位可用；读失败返回 `Reg_Read_Fail = 0x7FFF`（test.h:228，仅下标越界时）。
+- 备份寄存器占用：**DR1** = drv_rtc.c 的 RTC 初始化标记（`BKUP_REG_DATA 0xA0A0`，勿动）；
+  DR2 = RayTigCnt（已废）；DR5/6/7 = `test_bsp_rtc` MSH 测试占用；**DR8/DR9 已登记给拍照基点**。
+
+**改动（3 个文件）**：
+1. `test.h`：
+   - `BKP_Reg_Num` 新增 `PhotoBase_DR8 = 8` / `PhotoBase_DR9 = 9`
+   - **补 `BSP_Read_RTC_Reg` / `BSP_Write_RTC_Reg` 声明**（原来只在 test.c 内定义、头文件无声明 ⇒ 跨文件调用必隐式声明，既有缺陷）
+2. `Work_SY2.c`：
+   - 新增 `Photo_Base_Save()` / `Photo_Base_Load()`：**ENV + BKP 双写**；读取时**两源取"合法且较大"者**
+   - 新增 `TIMESTAMP_MAX_VALID = 4102444800UL`(2100-01-01)：**上界校验**——
+     ⚠️ BKP 掉电后可能读出全 0 或全 1，全 1 拼出 `0xFFFFFFFF` 会 > 任何真实时间戳，
+     若不做上界校验，取 max 会把基点顶到 2106 年 ⇒ **永不再拍照**
+   - `recode_timestampe_NEW()`：新增"手动/测试不推进基点"护栏（`ws_now==ws_KeyTig || jts.takephoto_test || jts.autotest` → 直接 return，连内存值都不改）；拍照基点改为走 `Photo_Base_Save()`
+   - `WorkTask_SY2()` 开机初始化改为 `Photo_Base_Load()`
+   - `Photo_Block_Reason()` 新增"测试进行中"拦截 —— ⚠️ **必须与 recode 护栏成对**：
+     若测试中 recode 不推进基点、而待机定点拍照仍照跑，会每秒重入 ⇒ 机械反复动作
+3. 版本号：**不再二次进位，仍 D046**（与上一批属同一次交付、他尚未编译）
+
+**双写而非只写 BKP 的理由**：ENV 是内部 Flash ⇒ 整机断电（含 VBAT）不丢，但**固件升级可能擦掉**；
+BKP 升级不影响，但**靠 VBAT**，电池耗尽/更换就丢。两处互补，任一失效可从另一处恢复（取 max）。
+
+**验证**：ARM GCC 14.2 工程真实参数 `-fsyntax-only` —— Work_SY2.c 仍是那 8 条既有诊断（行号偏移），
+control.c 2 条既有，**test.c 零诊断**（证明 test.h 新声明的枚举/函数签名全部匹配）。零新增。
+
+## 全链路自检（应若风要求）+ 修掉自检发现的 3 处问题
+**自检结论**：链路通；**抓出 1 个我上轮引入的回归 + 2 处严谨性缺口，已全部修掉**。
+
+1. 🔴 **回归（我引入）：`Updata_INR` 里放开了 `&& (Check_Allow_Work() == res_ok)`** → 已**回退**。
+   后果：设备远程关机(`ds=0`)/拍照被拦截时基点永不推进 ⇒ `Check_Photo_Near()` 恒真 ⇒ **RTU 永不断电**（电池设备致命）。
+   那句门槛恰好挡住这个状态——它是"只在工作窗口内做断电保护"，我误当成了"多余限制"。
+   ⚠️ 教训：待机拍照路径自己会 `ctr_RTU_DTU(ON)`+等 45s，这个 300s 保护在待机下**本来就不需要**，不必放开。
+2. 🟡 **BKP 缺有效性校验**：`0x7FFF7FFF`(≈2038-01-19) **恰好落在合法时间戳区间**，仅靠上下界拦不住，
+   会把基点顶到 2038 年 ⇒ 永不再拍照。→ 新增 `PhotoBase_DR10` 存魔数 `PHO_BASE_MAGIC 0x5048`，
+   写入顺序「先清魔数 → 写值 → 最后提交魔数」（防读到半更新值），Load 时魔数不符即视为无记录。
+3. 🟡 顺带补 `Get_REMAIN()` 声明到 test.h（与 `RTC_GET_TigVal` 同组，原来漏了，导致 Work_SY2.c/control.c/protocol.c
+   三处隐式声明）。修后 Work_SY2.c 诊断由 8 条降到 **7 条**，protocol.c 该条消除。
+
+**走查通过项**（重点记录，避免重复排查）：
+- 机械链路：`work_mode_pkg()` 用 `Mtor_Control_CM/ZP`（`TURN_*_L/R` 直驱 GPIO，**不需要** `ctr_lamp(ON,1)` 那路
+  步进驱动器电源）⇒ 待机拍照时机械能动作 ✓；`Mtor_Control` 的限位等待有 15s 超时（`time_out10`）非死等 ✓
+- 并发：`Hk_Take_io` 的 `CamFree` 互斥挡住待机定点拍照与测试拍照抢相机 ✓；
+  `static char temp[64]` 经核对**只被 `status_Pri` 用**（DTU 线程按命令串行）⇒ 无跨线程复用 ✓；
+  `tm_photo` 全部调用点都在 WorkTask 线程 ⇒ Save/Load 无跨线程问题 ✓
+- 双拍：待机路径与工作窗口路径互斥（`Check_Allow_Work() != res_ok` / `== res_ok`），且都走 recode 重置基点 ⇒ 不会双拍 ✓
+- 边界：跨窗口（19:59 开拍、20:05 拍完）→ 基点已推到次日 ⇒ 不双拍 ✓；`Photo_Tm_Str` 极端输入最多 148 次迭代 ⇒ 无死循环 ✓
+- 互指约束：`Photo_Block_Reason()` 的"测试进行中"与 `recode_timestampe_NEW` 的护栏**必须成对**，
+  否则测试中基点不推进 + 拍照照跑 ⇒ 每秒重入、机械反复动作。两处都写了互相引用的注释 ✓
+
+**遗留观察（未动，等若风定夺）**：
+- ⚠️ `RTC_SET_TigVal`(卷带计数) 每次机械动作都写 **ENV**（`Mtor_Control_ZP` 内 `read_cnt++` 后调用），
+  一次拍照 6 次 `Mtor_Control_ZP` ⇒ **6 次 Flash 写**。它是高频小值(16位)，**才是最该放 BKP 的**，
+  而且函数名本来就叫 RTC。现方案是 tm_photo 用 BKP、read_cnt 反而用 ENV，正好反了。
+
+### 追加：`RTC_SET/GET_TigVal` **决定不废弃**（若风 2026-09-30 10:07 定）
+- 若风一度要求"这是计数的、不需要了、直接注释掉"，**调查后他自己撤回**："我知道了是用来计算remain的，那先不动了"。
+- **不能注释掉的硬原因**：`read_cnt`(ENV键) 不只服务计数，还挂着 **`REMAIN` 协议正式字段**
+  （协议 V0.4 §2.1：`| REMAIN | 卷带余量（剩余量百分比）| 数值型 | 0~100 | 【原有】|`，`protocol.c:216` 上报）。
+- **完整调用链（共 8 处，改动前必查，勿再重复排查）**：
+  - `test.c:2077/2087` 定义（ENV 键 `read_cnt`）→ `test.c:2095 Get_REMAIN()`（`(JD_REMAIN_MAX - read_cnt)*100/600`）
+  - `protocol.c:216` → **`REMAIN` 上报字段**（平台契约）
+  - `hmi.c:471 / 709-710` → 屏幕 `workSta.coll_cnt.val`
+  - `control.c:2718/2765-2766` → `Mtor_Control_ZP` 内 `read_cnt++`（**唯一自增点**，每次机械动作+1）
+  - `control.c:2697`、`dtu_uart2.c:2254`、`hmi.c:709` → `RTC_SET_TigVal(0)` 三处清零入口
+  - `Work_SY2.c:1713` → `status_Pri` 的 `卷带计数` 诊断字段（**我加的**，也是判断"到底拍没拍"的远程硬证据）
+- 另注：`RayTigCnt_DR2 = 2` 枚举名说明 DR2 原本是"射线触发计数"，后被 `read_cnt`(卷带计数) 占用；
+  `Work_SY2.c:1578 RayTigCnt = RTC_GET_TigVal()` 把**射线计数**初始化为**卷带计数**，
+  且 `RayIrqHandlerA` 里 `RayTigCnt++` 只改内存**不写回 ENV** ⇒ 射线计数重启后被卷带值覆盖。
+  这是残留的错误耦合，**未动**，记此备查。
+- `Work_SY2.c` 仍存 7 条既有诊断：`Mtor_Control_CM`/`EXE_NTP_SETTIME` 隐式声明（后者在 `math_timestampe_NEW`
+  的 RTC 恢复分支里，ARM AAPCS 下指针与 int 同走 r0 实际无害，但属 UB）、`tig_cnt` 未用、
+  `rt_pin_attach_irq` 回调签名不符、`%d` 配 `uint32_t`、`ef_set_env_blob` volatile。

Application_SY2/Kconfig

@@ -0,0 +1,35 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "rt-thread"
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "$PKGS_DIR/packages/misc/samples/Kconfig"
+
+config SOC_FAMILY_STM32
+    bool
+
+config SOC_SERIES_STM32F1
+    bool
+    select ARCH_ARM_CORTEX_M3
+    select SOC_FAMILY_STM32
+
+config SOC_STM32F103RETX
+    bool
+    select SOC_SERIES_STM32F1
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y

Application_SY2/SConscript

@@ -0,0 +1,15 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

Application_SY2/SConstruct

@@ -0,0 +1,36 @@
+import os
+import sys
+import rtconfig
+
+RTT_ROOT = os.path.normpath(os.getcwd() + '/rt-thread')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except Exception as e:
+    print("Error message:", e.message)
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    sys.exit(-1)
+
+TARGET = 'rt-thread.elf'
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+env.AppendUnique(CPPDEFINES = ['STM32F101xE', 'USE_HAL_DRIVER'])
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# make a building
+DoBuilding(TARGET, objs)

Application_SY2/applications/Key.c

@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-03-20     RuoFeng       the first version
+ */
+#ifndef APPLICATIONS_KEY_C_
+#define APPLICATIONS_KEY_C_
+
+/*********************↓           define           ↓************************/
+
+#define DBG_ENABLE
+#define DBG_COLOR
+#define DBG_TAG "key"
+#define DBG_LEVEL DBG_INFO
+#include <rtdbg.h>
+
+#define KEY_THREAD_PRIORITY 11    // 线程优先级
+#define KEY_THREAD_STACK_SIZE 512 // 线程栈空间大小
+#define KEY_THREAD_TIMESLICE 10   // 时间片
+
+#define LED_PIN Key_OUT
+#define LED_ON() rt_pin_write(LED_PIN, PIN_HIGH)
+#define LED_OFF() rt_pin_write(LED_PIN, PIN_LOW)
+#define DELAY_UNIT 100
+
+#define ManualTime 30 // mins
+
+/*********************↑           define           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           include           ↓************************/
+
+#include <Key.h>
+
+/*********************↑           include           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           extern           ↓************************/
+
+extern works_def ws_now;
+
+/*********************↑           extern           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/********************↓           declaration          ↓***********************/
+
+static rt_timer_t KeyTimer; // 定时器命名
+static volatile bool GetIn = false;
+static volatile bool GetOut = false;
+
+/**
+ *
+ *
+ *
+ */
+
+/* 模式参数结构体 */
+typedef struct
+{
+    rt_uint16_t off_duration;
+    rt_uint16_t on_duration;
+    rt_uint8_t blink_count;
+} ModePattern;
+
+/* 模式参数映射表 */
+static const ModePattern mode_pattern[ws_typemax] = {
+    [ws_standby] = {10, 1, 1},    // 1000ms灭/100ms亮
+    [ws_wait0] = {10, 2, 2},      // 1000ms灭双闪
+    [ws_wait_coll] = {10, 10, 1}, // 1000ms周期
+    [ws_waitTig] = {10, 2, 3},    // 三连闪
+    [ws_KeyTig] = {3, 1, 1},      // 300ms灭/100ms亮
+    [ws_takephoto] = {5, 30, 1},  // 拍照相关模式
+};
+
+/********************↑           declaration          ↑***********************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓        global variables      ↓************************/
+
+volatile uint16_t KeyTigCnt = 0; // 按键触发计数
+static rt_bool_t KeyTrigFlag = RT_FALSE;
+
+/*********************↑        global variables      ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+/**********            Key Drivers                  ************/
+
+/* 防抖定时器回调 */
+static void KeyHandler(void *param)
+{
+    if (KeyTrigFlag == RT_TRUE)
+    {
+        rt_timer_stop(KeyTimer);
+        KeyTigCnt++;
+        rt_kprintf("[KeyFlags] get > %d\n", KeyTigCnt);
+    }
+    KeyTrigFlag = RT_FALSE;
+}
+
+static rt_err_t KeyIrqHandler(void *args)
+{
+    // rt_kprintf("[Key] A activated! \n");
+
+    if (KeyTrigFlag != RT_TRUE)
+    {
+        KeyTrigFlag = RT_TRUE;
+        rt_timer_start(KeyTimer);
+    }
+
+    return RT_EOK;
+}
+
+/**
+ * @brief 初始化按键
+ *
+ * @return int
+ */
+int ExtKeyInit(void)
+{
+    /* GPIO模式配置 */
+    rt_pin_mode(Key_IN, PIN_MODE_INPUT_PULLDOWN);
+    rt_pin_mode(Key_OUT, PIN_MODE_OUTPUT);
+
+    rt_pin_write(Key_OUT, OFF);
+    rt_pin_write(Key_IN, OFF);
+
+    rt_pin_attach_irq(Key_IN, PIN_IRQ_MODE_RISING, KeyIrqHandler, RT_NULL);
+    rt_pin_irq_enable(Key_IN, PIN_IRQ_ENABLE);
+
+
+    KeyTimer = rt_timer_create("KeyTimer",
+                               KeyHandler,
+                               RT_NULL,
+                               99, // 防抖时间
+                               RT_TIMER_FLAG_ONE_SHOT);
+
+    rt_kprintf("[Key] trigger initialized!\n");
+    return RT_EOK;
+}
+
+/**********            Key Drivers                  ************/
+
+static void ManualMode(void)
+{
+    works_def res = ws_standby;
+    bool rtu_status = rt_pin_read(RTU_DTU);
+    uint16_t cnt = 0;
+
+    res = ws_now;
+
+    while (cnt++ < (ManualTime * 200) && GetOut == false)
+    {
+        //rt_kprintf("ManualModeExc\n");
+        ws_now = ws_KeyTig;
+        if(rt_pin_read(RTU_DTU) != ON)
+        {
+            ctr_RTU_DTU(ON);
+        }
+        
+        LED_ON();
+        rt_thread_mdelay(150);
+        LED_OFF();
+        rt_thread_mdelay(150);
+    }
+    ws_now = res;
+    GetIn = false;
+    GetOut = false;
+    rtu_status ? ctr_RTU_DTU(ON) : ctr_RTU_DTU(OFF);
+}
+
+static void led_delay(uint16_t times)
+{
+    for (uint16_t a = 0; a < times; a++)
+    {
+        rt_thread_mdelay(DELAY_UNIT);
+        if (GetIn)
+        {
+            ManualMode();
+        }
+    }
+}
+
+static void led_thread_entry(void *param)
+{
+    int current_mode = 0;
+    while (1)
+    {
+        current_mode = ws_now;
+
+        if (ws_now >= ws_takephoto && ws_now <= ws_once_finsh)
+        {
+            current_mode = ws_takephoto;
+        }
+
+        LED_OFF();
+
+        led_delay(mode_pattern[current_mode].off_duration);
+
+
+//        if(ws_now == 10)
+        //rt_kprintf("ws now == tig : %d-%d-%d\n" , mode_pattern[current_mode].off_duration , mode_pattern[current_mode].on_duration,mode_pattern[current_mode].blink_count);
+        if (mode_pattern[current_mode].blink_count > 1)
+        {
+            for (int i = 0; i < mode_pattern[current_mode].blink_count; i++)
+            {
+                LED_ON();
+                led_delay(mode_pattern[current_mode].on_duration);
+
+                if (current_mode != ws_now && current_mode != ws_takephoto)
+                    if (current_mode != ws_now)
+                        break;
+                LED_OFF();
+                led_delay(mode_pattern[current_mode].on_duration);
+            }
+        }
+        else
+        {
+            LED_ON();
+            led_delay(mode_pattern[current_mode].on_duration);
+        }
+
+        //rt_kprintf("current_mode > %d \n", current_mode);
+        rt_thread_mdelay(100);
+    }
+}
+
+int led_init(void)
+{
+    rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
+    rt_thread_t tid = rt_thread_create("led", led_thread_entry,
+                                       RT_NULL, 512, 20, 10);
+    return tid ? rt_thread_startup(tid) : -1;
+}
+INIT_APP_EXPORT(led_init);
+
+static void Key_thread_entry(void *param)
+{
+    ExtKeyInit();
+
+    while (1)
+    {
+        while (KeyTigCnt == 0)
+        {
+            rt_thread_mdelay(10);
+        }
+
+        for (char a = 0; a < 100; a++)
+        {
+            rt_thread_mdelay(30);
+            if (KeyTigCnt >= 3)
+            {
+                break;
+            }
+        }
+
+        if (KeyTigCnt >= 3 && GetIn != true)
+        {
+            rt_kprintf("KeyTigCnt GetIn\n");
+            GetIn = true;
+            KeyTigCnt = 0;
+        }
+        else if (KeyTigCnt >= 3 && GetOut != true)
+        {
+            rt_kprintf("KeyTigCnt GetOut\n");
+            GetOut = true;
+            KeyTigCnt = 0;
+        }
+        else
+        {
+            KeyTigCnt = 0;
+        }
+    }
+}
+
+void KeyThreadStart(void)
+{
+
+    rt_thread_t Key_thread = rt_thread_create("Key_thread",
+                                              Key_thread_entry,
+                                              RT_NULL,
+                                              KEY_THREAD_STACK_SIZE,
+                                              KEY_THREAD_PRIORITY,
+                                              KEY_THREAD_TIMESLICE);
+
+    if (Key_thread != RT_NULL)
+    {
+        rt_thread_startup(Key_thread);
+    }
+    else
+    {
+        rt_kprintf("Key_thread start faild \n");
+    }
+}
+
+INIT_APP_EXPORT(KeyThreadStart);
+
+#endif /* APPLICATIONS_KEY_C_ */

Application_SY2/applications/Work_SY2.h

@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-08-16     RuoFeng       the first version
+ */
+#ifndef APPLICATIONS_WORK_XCT_H_
+#define APPLICATIONS_WORK_XCT_H_
+
+/*********************↓           define           ↓************************/
+
+#define Luxlimit_def 300    // 光控阈值
+#define tempup_def 50   // 温度上限
+#define tempdw_def 10   // 温度下限
+#define humiup_def 100  // 温度上限
+#define humidw_def 0    // 温度上限
+#define gktime_def 3    // 默认光控时长
+#define TakeINR 30 // mins 默认的拍照间隔
+
+/* 拍照定时参数默认值与取值范围 */
+#define PHO_INR_DAY_MIN 1     // 拍照间隔天数 最小值
+#define PHO_INR_DAY_MAX 7     // 拍照间隔天数 最大值
+#define PHO_INR_DAY_DEF 1     // 默认间隔天数(1天)
+#define PHO_T_HOUR_DEF 21     // 默认拍照时刻-时(21点)
+#define PHO_T_MIN_DEF 0       // 默认拍照时刻-分(整点)
+
+
+
+
+
+/*********************↑           define           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           include           ↓************************/
+
+#include "stm32f1xx_hal.h"
+
+/*********************↑           include           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           extern           ↓************************/
+
+
+
+/*********************↑           extern           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/********************↓           declaration          ↓***********************/
+
+typedef struct
+{
+    uint8_t temhumEN;
+    uint8_t LuxEN;
+    uint8_t RainEN;
+    int16_t temp_up;
+    int16_t temp_dw;
+    int16_t humi_up;
+    int16_t humi_dw;
+    uint8_t LuxTime;
+}Limit;
+
+
+typedef struct
+{
+    uint8_t start_work;             // 是否开始工作
+    RTC_TimeTypeDef start_time;     // 开始工作时间
+    uint16_t lux_set;               // 出发光控的阈值
+    uint8_t Read;                   // 是否读取了参数
+} Luxwork;
+
+
+
+typedef struct
+{
+    uint8_t en_tigmode;     // 工作模式
+    uint8_t fan_speed;      // 风机速度（10-100）
+    uint8_t Demo_mode;      // 演示模式
+    uint32_t Demo_cnt;      // 演示模式计数
+    uint8_t photo_finsh;    // 拍照完成
+    uint8_t not_poweroff;   // 拍照呢 别断电
+    uint8_t rtu_sta;        // 是否正常的开机就绪了
+    uint16_t dattim;
+    uint16_t photim;
+    uint8_t pho_inr_day;    // 拍照间隔天数 1-7（0=未配置, 开机校验后置默认）
+    uint8_t pho_t_hour;     // 拍照时刻-时 0-23
+    uint8_t pho_t_min;      // 拍照时刻-分 0-59
+}SYSCFG;
+
+void WorkTask_TN(void);
+
+
+struct tmm
+{
+  int   tm_sec;
+  int   tm_min;
+  int   tm_hour;
+  int   tm_mday;
+  int   tm_mon;
+  int   tm_year;
+  int   tm_wday;
+  int   tm_yday;
+  int   tm_isdst;
+#ifdef __TM_GMTOFF
+  long  __TM_GMTOFF;
+#endif
+#ifdef __TM_ZONE
+  const char *__TM_ZONE;
+#endif
+};
+
+
+ uint32_t math_timestampe_NEW(uint32_t *tim);
+ void recode_timestampe_NEW(uint32_t *tim);
+void ctr_RTU_DTU(uint8_t status_rtu);
+uint8_t Check_Photo_Trigger(void);       // 是否到达拍照触发时刻(间隔N天+指定时分)
+uint8_t Check_Photo_Near(void);          // 是否接近拍照触发时刻(保持RTU上电用)
+void Check_Photo_Param_Valid(void);      // 拍照参数合法性校验(非法/全0恢复默认)
+
+/********************↑           declaration          ↑***********************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓        global variables      ↓************************/
+
+/*********************↑        global variables      ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+
+#endif /* APPLICATIONS_WORK_XCT_H_ */

Application_SY2/applications/beep.c

@@ -0,0 +1,205 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-23     Administrator       the first version
+ */
+#include <rtdevice.h> //使用 RT-Thread 的设备需要包含此头文件
+#include <beep.h>
+#include <control.h>
+#include "hmi.h"
+
+Device_Status_typedef device_status;
+
+struct rt_device_pwm *pwm_device = RT_NULL; // 定义 pwm 设备指针
+struct rt_device_pwm *pwm_tim8 = RT_NULL;   // 定义 pwm 设备指针
+/*初始化蜂鸣器*/
+int beep_init(void)
+{
+    /*查找PWM设备*/
+    pwm_device = (struct rt_device_pwm *)rt_device_find(BEEP_PWM_DEVICE);
+    if (pwm_device == RT_NULL)
+    {
+        rt_kprintf("pwm device %s not found!\n", BEEP_PWM_DEVICE);
+        return -RT_ERROR;
+    }
+    return 0;
+}
+/*打开蜂鸣器*/
+int pwm_on(uint8_t pwn_ch, rt_uint32_t pwm_freq)
+{
+    rt_pwm_set(pwm_device, pwn_ch, pwm_freq, pwm_freq / 2);
+    rt_pwm_enable(pwm_device, pwn_ch); // 使能蜂鸣器对应的 PWM 通道
+    return 0;
+}
+/*关闭蜂鸣器*/
+int pwm_off(uint8_t pwn_ch, rt_uint32_t pwm_freq)
+{
+    rt_pwm_set(pwm_device, pwn_ch, pwm_freq, 0);
+    rt_pwm_disable(pwm_device, pwn_ch); // 使能蜂鸣器对应的 PWM 通道
+    return 0;
+}
+int pwm8_init(void)
+{
+    pwm_tim8 = (struct rt_device_pwm *)rt_device_find("pwm8");
+    if (pwm_tim8 == RT_NULL)
+    {
+        rt_kprintf("pwm device pwm8 not found!\n");
+        return -RT_ERROR;
+    }
+    return 0;
+}
+/*打开蜂鸣器*/
+int beep_on(void)
+{
+    rt_pwm_enable(pwm_device, BEEP_PWM_CH); // 使能蜂鸣器对应的 PWM 通道
+    return 0;
+}
+/*关闭蜂鸣器*/
+int beep_off(void)
+{
+    rt_pwm_disable(pwm_device, BEEP_PWM_CH); // 失能蜂鸣器对应的 PWM 通道
+    return 0;
+}
+/*在蜂鸣器设定函数里需要设定 蜂鸣器的频率和音量。PWM 设备设定的 API 是设定 周期 和 脉宽 的，
+ * 因此我们需要转换一下，将频率装换成周期，将音量大小（占空比）转换成脉宽。这里的周期的单位是 ns，
+ * 因此转换成的 秒 之后还要乘以 10^9 。由于无源蜂鸣器一般是低电平触发的，因此音量越大对应的脉宽就要越小。
+ * 然后，将转换后的数据传入 rt_pwm_set 来设置 PWM 设备的参数。
+ *
+ */
+void beep_set(uint32_t freq, uint32_t volume)
+{
+
+    rt_uint32_t period, pulse;
+    beep_init();
+    /* 将频率转化为周期 周期单位:ns 频率单位:HZ */
+    // period = 1000000000 / freq;  //unit:ns 1/HZ*10^9 = ns
+    period = freq; /* 周期为0.5ms，单位为纳秒500000ns-200k */
+    /* 根据声音大小计算占空比 蜂鸣器低电平触发 */
+    pulse = volume; // 5000
+
+    /* 利用 PWM API 设定 周期和占空比 */
+    rt_pwm_set(pwm_device, BEEP_PWM_CH, period, pulse); // channel,period,pulse
+    rt_pwm_enable(pwm_device, BEEP_PWM_CH);
+}
+void Beep_Tip(uint16_t volnum)
+{
+    rt_pin_mode(Beep, PIN_MODE_OUTPUT);
+    rt_pin_write(Beep, 1);
+    rt_thread_mdelay(volnum);
+    rt_pin_write(Beep, 0);
+}
+void Motor_Juandai(uint8_t on_off)
+{
+    pwm8_init();
+
+    rt_pwm_set(pwm_tim8, PC7_TIM3_CH, 200000, 100000); // channel,period,pulse
+
+    //
+    if (on_off == ON)
+    {
+        rt_pwm_enable(pwm_tim8, PC7_TIM3_CH);
+    }
+    else
+    {
+        rt_pwm_disable(pwm_tim8, PC7_TIM3_CH);
+    }
+}
+void Motor_Qingsao_R_PWM(uint8_t on_off)
+{
+    pwm8_init();
+    rt_pwm_set(pwm_tim8, PC7_TIM3_CH, 200000, 150000); // channel,period,pulse
+    if (on_off == ON)
+    {
+        rt_pwm_enable(pwm_tim8, PC7_TIM3_CH);
+    }
+    else
+    {
+        rt_pwm_disable(pwm_tim8, PC7_TIM3_CH);
+    }
+}
+void Motor_Qingsao_L_PWM(uint8_t on_off)
+{
+    pwm8_init();
+    rt_pwm_set(pwm_tim8, PC8_TIM3_CH, 200000, 150000); // channel,period,pulse
+    if (on_off == ON)
+    {
+        rt_pwm_enable(pwm_tim8, PC8_TIM3_CH);
+    }
+    else
+    {
+        rt_pwm_disable(pwm_tim8, PC8_TIM3_CH);
+    }
+}
+/**
+ * @brief 风机调速
+ *
+ * @param on_off 开关
+ * @param percent 百分比
+ */
+void CollFanSetPWM(uint8_t percent)
+{
+#define PWMMax 1000000
+
+    if (percent < 0 || percent > 100)
+    {
+        return;
+    }
+
+    beep_set(PWMMax, PWMMax * percent / 100); // 驱动器使能
+}
+
+// void coll_set25(void)
+//{
+//     CollFanSetPWM( 25);
+// }
+//
+// void coll_set50(void)
+//{
+//     CollFanSetPWM( 50);
+// }
+//
+// void coll_set75(void)
+//{
+//     CollFanSetPWM( 75);
+// }
+//
+// void coll_set100(void)
+//{
+//     CollFanSetPWM( 100);
+// }
+//
+// void coll_setOFF(void)
+//{
+//     CollFanSetPWM(10);
+// }
+//
+// MSH_CMD_EXPORT(coll_set25 , coll_set25);
+// MSH_CMD_EXPORT(coll_set50 , coll_set50);
+// MSH_CMD_EXPORT(coll_set75 , coll_set75);
+// MSH_CMD_EXPORT(coll_set100 , coll_set100);
+// MSH_CMD_EXPORT(coll_setOFF , coll_setOFF);
+
+void Motor_shake(uint8_t status_shake, uint16_t shake_sec)
+{
+    beep_init();
+    rt_pwm_set(pwm_device, PB1_TIM3_CH, 200000, 150000); // channel,period,pulse
+    if (status_shake == ON)
+    {
+        rt_pwm_enable(pwm_device, PB1_TIM3_CH);
+        if (shake_sec != 0)
+        {
+            rt_thread_delay(shake_sec * 1000);
+            rt_pwm_disable(pwm_device, PB1_TIM3_CH);
+            HMI_WRITE("cangWei.switchShake.val=%d", 0);
+        }
+    }
+    else
+    {
+        rt_pwm_disable(pwm_device, PB1_TIM3_CH);
+        HMI_WRITE("cangWei.switchShake.val=%d", 0);
+    }
+}

Application_SY2/applications/beep.h

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-23     Administrator       the first version
+ */
+#ifndef APPLICATIONS_INC_BEEP_H_
+#define APPLICATIONS_INC_BEEP_H_
+
+#include <rtthread.h>
+#define BEEP_PWM_DEVICE "pwm3"
+#define RAIN_PWM_DEVICE "pwm8"
+#define BEEP_PWM_CH 1
+int beep_init(void);                            //蜂鸣器初始化
+int beep_on(void);                              //蜂鸣器开
+int beep_off(void);                             //蜂鸣器关
+int pwm_off(uint8_t pwn_ch,rt_uint32_t pwm_freq);
+int pwm_on(uint8_t pwn_ch,rt_uint32_t pwm_freq);
+void beep_set(uint32_t freq, uint32_t volume);    //蜂鸣器设定
+void Beep_Tip(uint16_t volnum);
+/*****************************4.0******************************/
+void Motor_Qingsao_L_PWM(uint8_t on_off);
+void Motor_Qingsao_R_PWM(uint8_t on_off);
+/**************************吸虫塔****************************/
+void Motor_Juandai(uint8_t on_off);
+void Motor_shake(uint8_t status_shake,uint16_t shake_sec);
+/***********************************************************/
+#endif                                          /* APPLICATIONS_INC_BEEP_H_ */

Application_SY2/applications/control.h

@@ -0,0 +1,552 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-30     Administrator       the first version
+ */
+#ifndef APPLICATIONS_INC_CONTROL_H_
+#define APPLICATIONS_INC_CBD_CONTROL_H_
+#include <rtthread.h>
+#include <board.h>
+#include "stdio.h"
+#include <rtdevice.h>
+// 定制相关//////////////////////////////////////////////////////
+
+#define SENSOR_EN 1 // 温湿度:0关闭,1打开
+#define ROBOT_EN 0  // 机器人
+#define Color_EN 0  // 定制色诱
+#define BZYV2_EN 0  // 孢子仪2.0
+#define BOOT_ERR 1  // 1-新bootloader,0-旧bootloader()2023年9月份之前的设备升级需要设置为0
+////////////////////////////////////////////////////////////////
+
+
+// #define TESTMODE
+
+
+#define VERSION_NUM "D047"
+
+#define VERSION_KEY "SwversionVSY2"
+
+#define MAX_StepTime 5 // 最大步进上下行超时时间（秒）
+#define JD_REMAIN_MAX 600   // 胶带最大用量
+
+#define CompileTime sprintf(device_status.driver_compile, "%s-%s", __DATE__, __TIME__) // 编译时间，每次更新代码修改
+/*********************************************************************/
+
+extern uint8_t CheckLogTime(int16_t *log_en_cnt, int16_t log_en_inr);
+#define chk_log_time CheckLogTime(&log_en_cnt, log_en_inr) // 检查是否打印log的宏定义
+
+
+
+/**
+ * @brief dtype的编号 实际使用中直接填写名称代替编号
+ *
+ *      设备类型区分
+ *
+ */
+typedef enum
+{
+    dt_CBD = 7, // 测报灯
+    dt_BZY = 3  // 孢子仪
+} dtype_list;
+
+/**
+ * @brief vtype的编号 实际使用中直接填写名称代替编号
+ *
+ *      版本号区分
+ *
+ */
+typedef enum
+{
+    vt_ZP = 1,      // 转盘
+    //vt_HK = 4,      // 海康
+    vt_XCTm = 6,    // 吸虫塔
+    vt_BZY = 7,     // 孢子仪
+    vt_BZY_JD = 10, // 孢子仪 胶带结构 0x0A
+    vt_GK = 11,     // 高空
+    vt_ROBOT = 30,  // 海康机器人
+    //vt_SD = 41,     // 水稻
+    vt_4800 = 48,   // 4800
+    vt_XCT = 4     // 小虫体
+
+} vtype_list;
+
+/**
+ * @brief run_sta的编号 实际使用中直接填写名称代替编号
+ *
+ *      主工作流程的状态
+ */
+typedef enum
+{
+    rs_RESET = 0x00, // 起始状态/复位
+
+    rs_type_MX
+
+} run_sta_list;
+
+/*
+前：front - F
+后：back - B
+中：center - C
+*/
+
+typedef enum
+{
+    tl_Front = 0, // 尚未到
+    tl_Back,      // 已超过
+    tl_Center,    // 处于时间段
+    tl_Verifi,    // 参数校验失败
+    tl_Error      // 无效时间段
+} Temporal_list;  // 工作时间段的详细状态划分
+
+typedef enum
+{
+    mct_Foreward = 0, // 正转
+    mct_Reversal,     // 反转
+    mct_Stop,         // 停止
+    mct_auto          // 自动   //阀头使用
+} Motor_Ctl_type; // 适用于电机端口的类型选择
+
+typedef enum
+{
+    lt_Angle_0 = 1, // 0度限位 对应LIMIT_0->PC13
+    lt_Angle_90,    // 90 度限位 对应LIMIT_90->PB9
+
+} Limit_type; // 适用于限位开关的类型选择
+
+typedef enum
+{
+    mot_ZP = 0, // 转盘电机
+    mot_CM = 1  // 上仓门电机
+
+} Motor_type; // 适用于电机端口的类型选择
+
+typedef enum
+{
+    res_OK = 0, // 执行成功
+    res_Verifi, // 校验失败
+    res_Error,  // 执行失败
+    res_Timeout // 超时
+
+} Res_def; // 适用于功能函数的返回值类型
+
+typedef enum
+{
+    res_ok = 0, // 没问题
+    res_Time,   // 时控
+    res_Light,  // 光控
+    res_Temp,   // 温控
+    res_Humi,   // 湿控
+    res_Temp_D, // 温控（定位）
+    res_Humi_D, // 湿控（定位）
+    res_Rain,   // 雨控
+    res_PwrOff, // 设备已关机
+
+} Caw_def; // 适用于功能函数的返回值类型
+
+typedef struct
+{
+    uint8_t year;
+    uint8_t month;
+    uint8_t day;
+
+} work_day_def;
+
+typedef enum
+{
+    ws_standby = 0, // 待机
+    ws_wait0,       // 等待开始工作
+    ws_start_coll,  // 收集开始
+    ws_wait_coll,   // 等待收集完成
+    ws_takephoto,   // 立即拍照
+    ws_jumptake,    // 跳过拍照（退出）
+    ws_flap,        // 翻板
+    ws_once_finsh,  // 单次工作循环结束
+    ws_finsh,       // 今日工作结束
+    ws_waitTig,     // 红外触发模式 等待触发
+    ws_KeyTig ,     // 按键触发模式
+    ws_demo,
+    ws_typemax      // 最大值
+} works_def;
+
+
+typedef enum
+{
+    RunTime_wx= 0,
+    // RunTime_Tig_wx ,
+//    RunFRMS_wx ,
+    TypeMAX_wx
+}wm_Def;
+
+typedef struct
+{
+    wm_Def wm;
+    char keyword[24];
+}WorkMode_Def;
+
+
+typedef struct _packed
+{
+    uint8_t iSave; // 存储标志位
+    uint8_t dtype; // 设备类型?7-孢子仪,3-测报灯
+    /*孢子仪*/
+    uint8_t run_sta;            // 转盘的位置：0原始；1收集；2培养；3拍照；4凡士林,其他-测试
+    uint8_t cul_time;           // 培养时间
+    uint8_t stay_time;          // 已培养时间
+    uint8_t pre_temp;           // 培养仓温度
+    uint8_t box_temp;           // 箱体温度
+    uint8_t auto_test_sw;       // 一键测试   0-关   1-开
+    uint8_t cold_status;        // 制冷状态   0-关   1-开
+    uint8_t cold_sw;            // 制冷开关   0-关   1-开
+    uint8_t wind_sw;            // 风机开关   0-关   1-开
+    uint8_t collect_fan_status; // 采集状态   0-关   1-开
+    uint8_t autotakepic;        // 对焦拍照   0-关   1-开
+    uint8_t develop_flag;       // 是否进入培养模式
+    uint8_t cool_fan_status;    // 散热风机状态 0-停止 1-打开
+    uint8_t fsl_sw;             // 凡士林开关：0-关，1-开
+    uint8_t collecting_sh1;     // 采集开启1
+    uint8_t collecting_eh1;     // 采集关闭1
+    uint8_t collecting_sh2;     // 采集开启2
+    uint8_t collecting_eh2;     // 采集关闭2
+    uint8_t collecting_sh3;     // 采集开启3
+    uint8_t collecting_eh3;     // 采集关闭3
+    /*测报灯*/
+    uint8_t heat_sw;            // 加热开关
+    uint8_t photo_ws;           // 拍照
+    uint8_t power_status;       // 电源
+    uint8_t sun_test;           // 光控测测试标志位
+    uint8_t heat_status;        // 加热状态   0-关   1-开
+    uint8_t lamp_status;        // 灯管1状态   0-关   1-开
+    uint8_t lamp1_status;       // 灯管2状态   0-关   1-开
+    uint8_t lamp2_status;       // 灯管3状态   0-关   1-开
+    uint8_t up_status;          // 上仓门状态 0-停止 1-打开 2-关闭
+    uint8_t down_status;        // 下仓门状态 0-停止 1-打开 2-关闭
+    uint8_t clear_status;       // 清扫状态   0-停止 1-开始
+    uint8_t shake_ws;           // 震动       0-关   1-开
+    uint8_t heatvalue;          // 加热设定温度
+    uint8_t ctr_up_motor;       // 上仓门,    1打开,0关闭
+    uint8_t ctr_down_motor;     // 下仓门,    1打开,0关闭
+    uint8_t rain_status;        // 雨控              0-正常 1-欠压
+    uint8_t temp_status;        // 温控              0-正常 1-温控
+    uint8_t sun_status;         // 光控              0-正常 1-光控
+    uint8_t ds;                 // 设备状态   0-关机 1-开机
+    uint8_t work_status;        // 工作状态   0-待机 1-工作
+    uint8_t work_done;          // 工作结束   1-正常 0-工作已结束
+    uint8_t bat_status;         // 电压状态   1-正常 0-欠压
+    uint8_t heattime;           // 加热时间
+    uint8_t heat_time_min;      // 实时加热时间
+    uint8_t clt_time;           // 收集时间
+    uint8_t vol;                // 音量
+    uint8_t refresh_num;        // DTU数据刷新时间
+    uint8_t refresh_timeout;    // 刷新超时时间
+    uint8_t sunBar;             // 光控定时时间
+    uint8_t startBar;           // 时控开始时间
+    uint8_t stopBar;            // 时控结束时间
+    uint8_t tph;                // 高温保护
+    int8_t tpl;                 // 低温保护
+    uint8_t timeSwitch;         // 模式0光控，1时控
+    uint8_t link_sta;           // 有线接入状态：0-未接入,1已接入
+    uint8_t heattem;            // 加热仓温度(实时)
+    uint8_t hmi_fresh;          // 是否启动屏幕
+    uint8_t update_flag;        // 是否启动升级
+    uint8_t photo_type;         // 相机类型,0-USB,1-海康,2-大华
+    uint8_t version_type;       // 版本类型,1-转盘,4-海康,41-水稻,11-高空,48-4800,A-孢子仪
+    uint8_t stop_in_bootloader; // 进入bootloader模式 1
+    uint8_t account_status;     // 卡状态
+    uint8_t test_flag;          // 测试标志
+    uint8_t sensor_485_sta;     // 485传感器
+#if BOOT_ERR == 1
+    uint8_t gps_inuse;
+    uint8_t gps_view;
+#endif
+//    uint16_t dattim;            // 数据上传间隔
+//    uint16_t photim;            // 照片上传间隔
+    uint16_t shake_sec;         // 震动时间
+    uint16_t thsp;              // 息屏时间
+    rt_uint32_t num_updata;     //
+    rt_uint32_t rebootcnt;      // 启动次数
+    rt_uint32_t light_over_tim; // 光控定时差秒数，镇流器的结束时间
+    rt_uint32_t data_plan;      // 流量套餐
+    rt_uint32_t expiry_date;    // 到期时间
+    int passWord;               // 初始密码
+    const char *coll_time[10];
+    char mqttcfg1[64];         //
+    char mqttcfg2[64];         //
+    char csq[8];               // 信号强度
+    char net[8];               // 网络
+    char sim[8];               // SIM卡
+    char gps[8];               // 定位类型
+    char gps_state[8];         // 定位类型
+    char tempture[12];         // 温度
+    char humidity[12];         // 湿度
+    char driver[64];           // 版本
+    char driver_4g[64];        // 4g版本
+    char driver_bl[64];        // BL版本
+    char driver_compile[64];   // BL编译时间
+    char project[32];          // project,用于判断升级
+    char lng[32];              // 经度
+    char lat[32];              // 纬度
+    char stamp[32];            // 系统时间
+    char fuse_voltage[32];     // 保险丝电压
+    char iccid[32];            // SIM卡ICCID
+    char imei[32];             // IMEI,唯一ID
+    char json_w_clock[128];    // 修改时间
+    char json_w_reset[128];    //
+    char json_w_platform[128]; //
+    char power[8];             // 功率
+    char voltage[8];           // 电池电压
+    uint8_t camsta;            // 相机连接状态
+    uint8_t traplampsta;       // 诱捕灯状态
+    uint8_t rain_update;       // 雨控状态更新至雨控
+    uint8_t C01;
+} Device_Status_typedef;
+
+
+// typedef struct
+// {
+//     uint8_t addr;
+//     uint8_t sreg;
+    
+// }SYS;
+
+
+
+/************************************************/
+#define ON 1
+#define OFF 0
+#define LED0_PIN GET_PIN(B, 3)
+#define Beep GET_PIN(B, 4)
+#define OPEN 0x02
+#define CLOSE 0x03
+/************************************************/
+// 光控
+#define LIGHT_PIN GET_PIN(C, 0)
+// 雨控
+#define RAIN_PIN GET_PIN(C, 1)
+// 加热
+#define Heat_Pin GET_PIN(B, 12)
+// 采集/上仓门
+#define Collect_fan_R GET_PIN(C, 5)
+#define Collect_fan_L GET_PIN(C, 4)
+// 下仓门
+#define C_DOWN_R GET_PIN(B, 0)
+#define C_DOWN_L GET_PIN(B, 1)
+// 镇流器
+//#define LAMP_SW GET_PIN(C, 9)
+// 震动电机
+#define SHAKE_SW GET_PIN(B, 2)
+// 补光
+#define LED_SW GET_PIN(A, 15)
+// 清扫
+#define CLEAR_R GET_PIN(C, 7)
+#define CLEAR_L GET_PIN(C, 8)
+// 相机供电+
+//#define PHOTO GET_PIN(A, 12)
+// 路由器供电
+#define ROUTER GET_PIN(A, 8)
+#define RE GET_PIN(B, 14)
+
+
+//
+//// RTU/DTU供电
+//#define RTU_DTU GET_PIN(B, 13)
+//// 相机供电
+//#define CAM_CTL GET_PIN(B, 15)
+// 海康相机拍照
+//#define HK_TAKE GET_PIN(A, 11)
+
+
+
+
+
+//#define HK_IO GET_PIN(B, 14) // 备用触发拍照
+#define HK_IO GET_PIN(C, 13)    //新的触发拍照io 适配xct小板子
+// 清扫限位
+//#define CLEAR_R_LIMIT GET_PIN(C, 13)
+//#define CLEAR_L_LIMIT GET_PIN(B, 9)
+#define CLEAR_R_LIMIT GET_PIN(B, 14)    //unuse
+#define CLEAR_L_LIMIT GET_PIN(B, 14)    //unuse
+
+/*****************************4.0定制多光源*********************************/
+#define LAMP_0_SW GET_PIN(B, 9)
+#define LAMP_1_SW GET_PIN(B, 10)
+#define LAMP_2_SW GET_PIN(B, 11)
+/***************************高空测报灯*************************/
+
+// 上仓门电机限位
+#define CTR_UPO_LIMIT GET_PIN(C, 13)
+#define CTR_UPC_LIMIT GET_PIN(B, 9)
+// 下仓门电机限位
+//#define CTR_DWO_LIMIT GET_PIN(B, 5)
+//#define CTR_DWC_LIMIT GET_PIN(B, 8)
+// 雨控电机限位，控制排水和落虫
+
+#define CTR_RO_LIMIT GET_PIN(B, 15)
+#define CTR_RC_LIMIT GET_PIN(C, 6)
+/******************************吸虫塔*********************************/
+#define HK_5000W_P GET_PIN(B, 12)
+#define ROUTER_P GET_PIN(B, 10)
+#define LED_P GET_PIN(B, 11)
+
+#define PC7_TIM3_CH 2 // pwm8
+#define PC8_TIM3_CH 3 // pwm8
+
+#define PB1_TIM3_CH 4 // pwm3
+
+//#define MOTOR1_CTR_PIN GET_PIN(C, 9) // 吸虫电机IO
+#define MOTOR2_CTR_PIN GET_PIN(B, 2) // 吸附电机IO
+
+#define MOTOR_CR_PIN GET_PIN(C, 7)
+#define MOTOR_CL_PIN GET_PIN(C, 8)
+
+#define MOTOR_C_LIMIT GET_PIN(C, 13) // 卷带限位
+
+void ctr_JD_Clear(uint8_t shake_sw);
+uint8_t ctr_Motor_xichong(uint8_t status_ws);
+uint8_t ctr_Motor_xifu(uint8_t status_ws);
+uint8_t ctr_Camera_Power(uint8_t status_ws);
+/*****************************5.0测报灯******************************/
+void ctr_turnv5(void);
+/*****************************孢子仪**********************************/
+// 制冷
+#define Cold_Pin GET_PIN(B, 11)
+// 采集
+#define Collect_Fan GET_PIN(B, 10)
+
+
+// 散热
+#define Cool_Fan_R GET_PIN(C, 5)
+#define Cool_Fan_L GET_PIN(C, 4)
+// 步进电机限位
+#define LIMIT_UP GET_PIN(B, 8)
+#define LIMIT_DOWN GET_PIN(B, 5)
+// 步进电机驱动
+#define Motor_EN GET_PIN(B, 14)
+#define Motor_DIR GET_PIN(B, 15)
+void ctr_turn(uint8_t v, uint8_t sta);
+uint8_t ctr_Cold(uint8_t status_cold);
+uint8_t ctr_Cool_Fan(uint8_t status_cool);                                                // 散热风机
+uint8_t ctr_Collect_Fan(uint8_t status_collect);                                          // 采集风机
+Res_def ctr_Motor_Driver(uint8_t EN, uint8_t DIR, rt_uint32_t pwm, rt_uint32_t time_out); // 步进电机
+void ctr_Petroleum_jelly(rt_uint32_t delay);                                              // 凡士林
+/*****************************定制4.0-2000W***************************************/
+#define FAN_P GET_PIN(B, 10)
+#define FAN_I GET_PIN(B, 11)
+uint8_t ctr_Fan_IN(uint8_t status_ws);
+uint8_t ctr_Fan_PUT(uint8_t status_ws);
+/*******************************定制展厅机器人************************************/
+//#define LIMIT_OPEN GET_PIN(B, 8)
+//#define LIMIT_CLOSE GET_PIN(B, 5)
+#define Motor_Power GET_PIN(B, 10)           // 电机驱动供电
+#define Motor_Direction_Button GET_PIN(B, 9) // IO输入,检测按键状态,用于控制方向
+#define Motor_Direction_Ctr GET_PIN(B, 15)   // IO输出,控制电机运动方向
+#define EMS_Dir GET_PIN(B, 14)
+void ctr_Motor_Robot(uint8_t status_ws);
+/****************************定制色诱***************************************************/
+#define LIMIT_RESET GET_PIN(C, 13)
+#define LIMIT_BOARD GET_PIN(B, 9)
+//#define KEY_RESET GET_PIN(B, 8)
+//#define KEY_BACK GET_PIN(B, 5)
+int ctr_Color_board(uint8_t forward, uint16_t time_board);
+/***************************************************************/
+/***************************************************************/
+uint8_t ctr_Heat(uint8_t status_heat);                       // 加热
+uint8_t ctr_cangmen_up(uint8_t status_up);                   // 上仓门
+uint8_t ctr_cangmen_down(uint8_t status_down);               // 下仓门
+uint8_t ctr_lamp(uint8_t status_lamp, uint8_t lamp_num);     // 镇流器
+uint8_t ctr_shake(uint8_t status_shake, uint16_t shake_sec); // 震动
+uint8_t ctr_clear(uint16_t status_clear);                    // 清扫
+void ctr_TG_Clear(uint16_t clear_timeout);                   // 清扫2
+uint8_t ctr_led(uint8_t status_led);                         // 补光灯
+void calorstat(uint16_t heat_time);                          // 恒温
+void ctr_router(uint8_t status_router);                      // 路由器
+void turnzp(void);                                           // 转仓
+// 拍照结果(供运维页远程诊断: 为什么没拍/拍了失败)
+typedef struct
+{
+    uint32_t tig_tm;  // 上次触发拍照时刻(Unix秒, 0-无记录)
+    uint32_t res_tm;  // 上次拍照出结果时刻(0-尚未出结果)
+    uint8_t res;      // 0-无记录 1-成功 2-失败(图像传输超时) 3-未执行(相机忙) 4-进行中
+    uint8_t io_type;  // 触发类型(Hk_Take_io 入参: 1-工作包 8-一键测试 9-立即拍照)
+} Photo_Stat_t;
+
+extern Photo_Stat_t photo_stat;
+
+Res_def Hk_Take_io(char type);                                    // 触发拍照
+void HK_TakePhoto(void);                                     // 拍照
+void ctr_photo(uint8_t status_photo);
+
+void HardWare_Init(uint8_t boot);  // 初始化
+void HardWare_Check(uint8_t boot); // 自检
+void ResetInit(void);              // 上电复位
+void SunTest(void);                // 光控测试
+/*****************************************************/
+void WorkTask_XCT(void);
+/****************************************************/
+void WorkCheck(void); // 工作检测
+void WorkTask(void);  // 工作任务
+//
+/***********************孢子仪****************************/
+
+void BZY_JD_AutoTest(void); // 孢子仪 一键测试
+
+/***************************************************/
+// 线程
+int Control_clear(void);
+int Workstatus_check(void);
+int Work_Loop_Task(void);
+int Control_heat(void);
+
+
+
+
+/*****************************   天牛的IO定义   **********************************/
+
+
+// RTU供电  已修改 √
+#define RTU_DTU GET_PIN(A, 8)
+
+// 相机供电  已修改 √
+#define CAM_CTL GET_PIN(B, 15)
+
+// 外部按键 已验证  √
+#define Key_IN  GET_PIN(A, 11)
+#define Key_OUT GET_PIN(A, 12)
+
+// 落虫红外触发
+#define RayTigA GET_PIN(B, 8)  // PB8
+#define RayTigB GET_PIN(B, 5)  // PB5
+
+
+// 控制数字5V
+#define CTL_5V GET_PIN(C, 9)
+// 控制传感器12V
+#define CTL_SENSOR_12V GET_PIN(B, 13)
+
+// 上仓门
+#define TURN_CM_R GET_PIN(C, 8)
+#define TURN_CM_L GET_PIN(C, 7)
+
+// 翻板
+#define TURN_ZP_R GET_PIN(B, 0)
+#define TURN_ZP_L GET_PIN(B, 1)
+
+// 转盘限位
+#define LIMIT_0 GET_PIN(C, 13)   // 其实此时电机是没有限位的 阀头自带 找了一个没用的IO先放上
+#define LIMIT_90 GET_PIN(C, 13)  // 其实此时电机是没有限位的 阀头自带 找了一个没用的IO先放上
+
+
+
+/*****************************   天牛的IO定义   **********************************/
+
+
+
+Res_def SendReadInfo(char c);
+
+
+
+
+#endif /* APPLICATIONS_INC_CONTROL_H_ */

Application_SY2/applications/dtu_uart2.h

@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-28     Administrator       the first version
+ */
+#ifndef APPLICATIONS_INC_DTU_UART2_H_
+#define APPLICATIONS_INC_DTU_UART2_H_
+
+#define DTU_UART_NAME "uart2"  /*串口设备名称*/
+#define MAX_DTU_SIZE 512
+typedef struct{
+    char msg_pool[MAX_DTU_SIZE];
+}DataTemp;
+
+//查询数据---{"cmd": "read"}
+//重启-------{"cmd": "reboot"}
+//升级-------{"cmd": "update"}
+//拍照-------{"cmd": "takephoto"}
+//{"cmd":"paramconf","ext":{"hst":110,"collt":10,"et":6,"datt":2,"shake_sec":1,"tpl":5,"shake":1,"tph":70,"ts":1,"st":20,"imgres":2,"htim":20,"tt":8}}
+
+//{"cmd":"synchronization","ext":{"year":1,"month":1,"day":0,"hour":25,"min":0,"sec":0,"lat":"113.2056","lng":"21.0596","csq",31,"net",0,"iccid","123135453","imei":"895864646464464"}}
+void DTU_Write(char *fmt, ...);
+int dtu_data_play(void);
+int parseDtu(char *json_string);
+char *makeJson(uint8_t type);
+char *makeJson_platform(char *plt);
+char *makeJson_Rtutakephoto();
+
+char *makeJson_takephoto();
+char *makeJson_Warn(char * s,char *t);
+void UpLoad_Data(uint8_t type);
+char * uint8tostring(uint8_t dat);
+
+typedef enum
+{
+    read_limit_rcd = 0,
+    TEMP_ON_rcd,
+    TEMP_OFF_rcd,
+    RAIN_ON_rcd,
+    RAIN_OFF_rcd,
+
+    RunLight_rcd,
+    RunTime_rcd,
+    Read_ecode_rcd,
+    Read_status_rcd,
+    FBtest_rcd,
+    SCMtest_rcd,
+    Clear_log_rcd,
+    TypeMAX_rcd
+}RCD;
+
+typedef struct
+{
+    RCD rcd;
+    char keyword[15];
+}RC_Def;
+
+
+
+#endif /* APPLICATIONS_INC_DTU_UART2_H_ */
+
+

Application_SY2/applications/hmi.h

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-26     Administrator       the first version
+ */
+#ifndef APPLICATIONS_INC_HMI_H_
+#define APPLICATIONS_INC_HMI_H_
+#include <rtthread.h>
+
+#define FLASH_FLAG  2
+
+
+#define UART_NAME "uart4"  /*串口设备名称*/
+#define MAX_SIZE 512
+#define HMI_UART_RXBUFFER_SIZE 150
+extern rt_device_t serial;   /*串口设备句柄*/
+extern uint8_t dbg_flag;
+extern uint8_t DBG_EN;  //是否使能调试打印
+void Check_ParamConfig(void);
+void HMI_WRITE(char *fmt,...);
+void Fresh_Hmi(void);
+int Hmi_Fresh(void);
+void ResetParamDefault(void);
+void ResetParamDefault_DC(void);
+void app_partion_backup(void);
+void Debug_log_OFF(void);
+void Debug_log_ON(void);
+void bubblesort(int a[], int n);
+#endif /* APPLICATIONS_INC_HMI_H_ */

Application_SY2/applications/key.h

@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-03-20     RuoFeng       the first version
+ */
+#ifndef APPLICATIONS_KEY_H_
+#define APPLICATIONS_KEY_H_
+
+/*********************↓           define           ↓************************/
+
+/*********************↑           define           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           include           ↓************************/
+
+// #include <main.h>
+#include <Work_SY2.h>
+#include "rs485.h"
+#include "control.h"
+#include "test.h"
+#include <easyflash.h>
+#include "dtu_uart2.h"
+
+/*********************↑           include           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           extern           ↓************************/
+
+/*********************↑           extern           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/********************↓           declaration          ↓***********************/
+
+void KeyThreadStart(void);
+
+/********************↑           declaration          ↑***********************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓        global variables      ↓************************/
+
+/*********************↑        global variables      ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+#endif /* APPLICATIONS_KEY_H_ */

Application_SY2/applications/main.c

@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2006-2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-09-09     RT-Thread    first version
+ */
+
+#include <rtthread.h>
+#include <board.h>
+#include <rtdevice.h>
+#include "beep.h"
+#include "hmi.h"
+#include <control.h>
+#include "dtu_uart2.h"
+#include "sht30_collect.h"
+#include "sound.h"
+#include <ledblink.h>
+#include "test.h"
+
+#define DBG_ENABLE
+#define DBG_COLOR
+#define DBG_TAG "main"
+#define DBG_LEVEL DBG_LOG
+#include <rtdbg.h> //must after of DBG_LVL, DBG_TAG or other options
+
+#define WDT_DEVICE_NAME "wdt" /* 看门狗设备名称 */
+/********************************************************************/
+rt_device_t wdg_dev; /* 看门狗设备句柄 */
+Device_Status_typedef device_status;
+
+/*****************LED thread*****************************************/
+/*栈空间地址对齐*/
+ALIGN(RT_ALIGN_SIZE)
+/********************************************************************/
+// 外部函数声明，消除警告信息
+int memtrace();
+/********************************************************************/
+static int wdt_init(void);
+static void idle_hook(void);
+/********************************************************************/
+int main(void)
+{
+
+    CompileTime; // 读取固件的编译时间
+    /* 初始化设备 */
+    rt_device_init(wdg_dev);
+    led_add_device(LED0_PIN);
+    led_set_level(1, 0);
+    LOG_W("System Clock information:");
+    LOG_I("SYSCLK_Frequency = %d", HAL_RCC_GetSysClockFreq());
+    LOG_I("HCLK_Frequency   = %d", HAL_RCC_GetHCLKFreq());
+    LOG_I("PCLK1_Frequency  = %d", HAL_RCC_GetPCLK1Freq());
+    LOG_I("PCLK2_Frequency  = %d", HAL_RCC_GetPCLK2Freq());
+    Beep_Tip(100);
+
+
+    // Mtor_Control_CM(mct_Foreward, 1500);
+    // Mtor_Control_ZP(mct_Foreward , 0); // 开始工作前给翻版复位
+    // Mtor_Control_CM(mct_Reversal, 1500);
+
+    // 读FLASH配置文件,未配置则设置默认配置
+    Check_ParamConfig();
+
+    // Recode_e_code(e_reboot , 0);
+
+    // 是否触发固件更新
+    if (device_status.update_flag == 0)
+    {
+        // 开机自检
+        if (device_status.version_type != vt_ROBOT)
+        {
+            HardWare_Check(0);
+        }
+
+
+        // 工作状态置位线程
+        if (device_status.dtype != dt_BZY && device_status.version_type != vt_ROBOT)
+        {
+            Workstatus_check();
+        }
+
+        /********************/
+        // 工作流程
+        if (device_status.version_type != vt_ROBOT)
+        {
+            Work_Loop_Task();
+        }
+        /*******************/
+    }
+    // 看门狗初始化
+    wdt_init();
+    // 打印内存占用
+    memtrace();
+}
+/*初始化看门狗*/
+static int wdt_init(void)
+{
+    rt_err_t ret = RT_EOK;
+    rt_uint32_t timeout = 10; /*溢出时间,秒*/
+    /* 根据设备名称查找看门狗设备，获取设备句柄 */
+    wdg_dev = rt_device_find(WDT_DEVICE_NAME);
+    if (!wdg_dev)
+    {
+        LOG_E("find %s failed!", WDT_DEVICE_NAME);
+        return RT_ERROR;
+    }
+    /* 设置看门狗溢出时间 */
+    ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_SET_TIMEOUT, &timeout);
+    if (ret != RT_EOK)
+    {
+        LOG_E("set %s timeout failed!", WDT_DEVICE_NAME);
+        return RT_ERROR;
+    }
+    /* 启动看门狗 */
+    ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_START, RT_NULL);
+    if (ret != RT_EOK)
+    {
+        LOG_E("start %s failed!", WDT_DEVICE_NAME);
+        return -RT_ERROR;
+    }
+    /* 设置空闲线程回调函数 */
+    rt_thread_idle_sethook(idle_hook);
+    return ret;
+}
+
+/*空闲钩子函数*/
+static void idle_hook(void)
+{
+    // #if 1
+    // #if Color_EN == 0
+    //     time_t now;
+    //     time(&now);
+    //     static struct tm alarm_new;
+    //     alarm_new = *localtime(&now);
+    //     if ((alarm_new.tm_hour) == 8 && (alarm_new.tm_min == 20) && (alarm_new.tm_sec == 0))
+    //     {
+    // #if ROBOT_EN == 0
+    //         rt_hw_cpu_reset();
+    // #endif
+    //     }
+    // #endif
+    // #endif
+    //     //    else {
+    //     //        rt_kprintf("%d:%d:%d\n",alarm_new.tm_hour,alarm_new.tm_min,alarm_new.tm_sec);
+    //     //    }
+    //     /* 在空闲线程的回调函数里喂狗 */
+    rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_KEEPALIVE, NULL);
+    led_tog(1);
+    // rt_kprintf("feed the dog!\n ");
+}
+/*
+1   INIT_BOARD_EXPORT(fn)   非常早期的初始化，此时调度器还未启动
+2   INIT_PREV_EXPORT(fn)    主要是用于纯软件的初始化、没有太多依赖的函数
+3   INIT_DEVICE_EXPORT(fn)  外设驱动初始化相关，比如网卡设备
+4   INIT_COMPONENT_EXPORT(fn)   组件初始化，比如文件系统或者 LWIP
+5   INIT_ENV_EXPORT(fn) 系统环境初始化，比如挂载文件系统
+6   INIT_APP_EXPORT(fn) 应用初始化，比如 GUI 应用
+*/
+
+// uint8_t log_en_inr = 10; // 打印log的速度 数值越小 打印越频繁
+// static int8_t log_en_cnt = -1;
+uint8_t CheckLogTime(int16_t *log_en_cnt, int16_t log_en_inr);
+/**
+ * @brief 用于确认打印log的时机
+ *
+ * @param log_en_cnt 计数使用
+ * @param log_en_inr 频率（与数值成正比）
+ * @return uint8_t 1-开启 0-关闭
+ */
+uint8_t CheckLogTime(int16_t *log_en_cnt, int16_t log_en_inr)
+{
+    uint8_t res = 0;
+    if ((*log_en_cnt == log_en_inr - 1) || (*log_en_cnt == -1))
+    {
+        if (*log_en_cnt == -1)
+        {
+            *log_en_cnt = 1;
+        }
+        else
+        {
+            *log_en_cnt = 0;
+        }
+        res = 1;
+    }
+    else
+    {
+        *log_en_cnt += 1;
+    }
+
+    // rt_kprintf("log_en_cnt  - log_en_inr %d / %d  %d\n" , *log_en_cnt , log_en_inr , res);
+
+    if (log_en_cnt > log_en_inr || log_en_inr < -1)
+        return res;
+    return res;
+}

Application_SY2/applications/protocol.c

@@ -0,0 +1,715 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-03-27     RuoFeng       the first version
+ */
+/*********************↑           declaration           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+/*********************↓           define           ↓************************/
+#define DBG_ENABLE
+#define DBG_COLOR
+#define DBG_TAG "tn"
+#define DBG_LEVEL DBG_INFO
+#include <rtdbg.h>
+
+#define RSSI_TO_DBM(rssi) (2 * (rssi) - 113)
+
+/*********************↑           define           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           include           ↓************************/
+
+#include <rtthread.h>
+#include "rs485.h"
+#include "dtu_uart2.h"
+#include "string.h"
+#include "control.h"
+#include <Work_SY2.h>
+#include <easyflash.h>
+#include "protocol.h"
+#include "test.h"
+#include "cJSON.h"
+
+/*********************↑           include           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           extern           ↓************************/
+
+extern uint8_t ReFlash_RTC(void);
+
+extern Device_Status_typedef device_status;
+extern RTC_DateTypeDef GetDate;
+extern RTC_TimeTypeDef GetTime;
+extern Sensor sensor[MAX_SENSOR_NUM];
+extern JD_Test_Sta jts;
+
+extern int cjson_getval(cJSON *json);
+extern Limit limit;
+
+extern uint16_t RayTigCnt;
+extern char CamFree;
+
+/*********************↑           extern           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/********************↓           declaration          ↓***********************/
+
+/********************↑           declaration          ↑***********************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓        global variables      ↓************************/
+
+static struct RES_Type res_c = {0};
+
+/*********************↑        global variables      ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+/**
+ * @brief Get the Timing object 获取时间戳
+ *
+ * @param str
+ */
+void GetTiming(char *str, char len)
+{
+    ReFlash_RTC();
+
+    if (len < 28)
+    {
+        rt_kprintf("GetTiming > str so short %d\n", len);
+        return;
+    }
+
+    sprintf(str, "%04d-%02d-%02dT%02d:%02d:%02d.%03d",
+            (GetDate.Year % 2000) + 2000,
+            GetDate.Month,
+            GetDate.Date,
+            GetTime.Hours,
+            GetTime.Minutes,
+            GetTime.Seconds,
+            0);
+}
+
+/**
+ * @brief Get the now temphumi object
+ * 
+ * @param temp 
+ * @param humi 
+ */
+void get_now_temphumi(char *temp_c , char *humi_c)
+{
+
+    if (sensor[s_Temp].online && strstr(sensor[s_Temp].eValue, "99.99") == NULL)
+    {
+        sprintf(temp_c , "%s" , sensor[s_Temp].eValue);
+    }
+    else
+    {
+        sprintf(temp_c , "%s" , device_status.tempture);
+    }
+    if (sensor[s_Humi].online && strstr(sensor[s_Humi].eValue, "99.99") == NULL)
+    {
+        sprintf(humi_c , "%s" , sensor[s_Humi].eValue);
+    }
+    else
+    {
+        sprintf(humi_c , "%s" , device_status.humidity);
+    }
+    
+
+}
+
+
+
+
+extern char Demo_Mode_NEW;
+extern SYSCFG syscfg;
+extern wm_Def workmode;
+/**
+ * @brief 生成新版的状态数据包
+ *
+ * @return char* 直接以字符串的形式返回
+ */
+char *makeJson_NEW(uint8_t type)
+{
+
+    char cache[128] = {0};
+
+    // 创建根JSON对象
+    cJSON *root = cJSON_CreateObject();
+    if (!root)
+        return NULL;
+
+    // 添加字符串类型字段
+    cJSON_AddStringToObject(root, "DEVICE_SERIAL_NUMBER", device_status.imei);
+
+    if (type == 1)
+    {
+        cJSON_AddStringToObject(root, "ACTION_ID", res_c.ACTION_ID);
+        cJSON_AddStringToObject(root, "COMMAND", res_c.COMMAND);
+        GetTiming(res_c.TIMING, sizeof(res_c.TIMING));
+        cJSON_AddStringToObject(root, "TIMING", res_c.TIMING);
+        cJSON_AddStringToObject(root, "RESULT", res_c.RESULT);
+    }
+
+    cJSON_AddStringToObject(root, "SIM", device_status.iccid);
+
+    // sprintf(cache, "%d", RSSI_TO_DBM(atoi(device_status.csq)));
+    cJSON_AddStringToObject(root, "SIGNAL", device_status.csq);
+
+    sprintf(cache, "%s,%s", device_status.lng, device_status.lat);
+    cJSON_AddStringToObject(root, "LOCATION", cache);
+
+    (atoi(device_status.net) == 0) ? cJSON_AddStringToObject(root, "STATUS", "STATUS_ONLINE") : cJSON_AddStringToObject(root, "STATUS", "STATUS_OFFLINE");
+
+    cJSON_AddStringToObject(root, "STATUS_DESCRIPTION", "设备运行正常"); // 需要修改  // 但是好像没有异常的时候啊 先不改
+
+    GetTiming(cache, sizeof(cache));
+    cJSON_AddStringToObject(root, "UPDATE_DATE", cache);
+
+    // 添加数值类型字段
+    cJSON_AddNumberToObject(root, "VOLTAGE", atof(device_status.voltage));
+    cJSON_AddNumberToObject(root, "CURRENT", atof(device_status.power));
+
+
+    char temp_c[6] = {0};
+    char humi_c[6] = {0};
+
+    get_now_temphumi(temp_c , humi_c);
+
+
+    cJSON_AddNumberToObject(root, "TEMPERATURE", atof(temp_c));
+    cJSON_AddNumberToObject(root, "HUMIDITY", atof(humi_c));
+    // cJSON_AddNumberToObject(root, "TPS", device_status.temp_status);
+    // cJSON_AddNumberToObject(root, "RPS", device_status.rain_status);
+    cJSON_AddNumberToObject(root, "DEMO", Demo_Mode_NEW);
+    cJSON_AddNumberToObject(root, "REMAIN", Get_REMAIN());
+
+    sprintf(cache, "%d", syscfg.dattim);
+    cJSON_AddStringToObject(root, "DATT", cache);
+
+    sprintf(cache, "%d", syscfg.pho_inr_day);
+    cJSON_AddStringToObject(root, "PHO_INR_DAY", cache);
+    sprintf(cache, "%d", syscfg.pho_t_hour);
+    cJSON_AddStringToObject(root, "PHO_T_HOUR", cache);
+    sprintf(cache, "%d", syscfg.pho_t_min);
+    cJSON_AddStringToObject(root, "PHO_T_MIN", cache);
+
+    sprintf(cache, "%d", limit.temhumEN);
+    cJSON_AddStringToObject(root, "TEMP_LIMIT", cache);
+    sprintf(cache, "%d", limit.temp_up);
+    cJSON_AddStringToObject(root, "TEMP_UP", cache);
+    sprintf(cache, "%d", limit.temp_dw);
+    cJSON_AddStringToObject(root, "TEMP_DOWN", cache);
+
+
+    Get_work_mode();
+    sprintf(cache, "%d", workmode);
+    cJSON_AddStringToObject(root, "CONTROL", cache);
+
+    sprintf(cache, "%s-%s", VERSION_NUM, device_status.driver_4g);
+    cJSON_AddStringToObject(root, "VERSION", cache);
+    cJSON_AddStringToObject(root, "HISTORY_DATA", "0");
+
+    if (type == 2 || type == 3 || type == 4)
+    {
+        if (type != 4)
+        {
+            CamFree = 1;       // 拍照完成
+        }
+        
+        if(type == 4)
+        {
+            cJSON_AddStringToObject(root, "PIC_RES", "START");
+            if(device_status.camsta == 0)
+            {
+                cJSON_AddStringToObject(root, "CAM_STA", "linkup");
+            }
+            else
+            {
+                cJSON_AddStringToObject(root, "CAM_STA", "linkdown");
+            }
+        }
+        else
+        {
+            (type == 2) ? cJSON_AddStringToObject(root, "PIC_RES", "SUCC") : cJSON_AddStringToObject(root, "PIC_RES", "FAIL");
+        }
+        
+    }
+
+    // 生成紧凑型JSON字符串
+    char *json_str = cJSON_PrintUnformatted(root);
+
+    // 清理cJSON对象
+    cJSON_Delete(root);
+
+    DTU_Write(json_str);
+
+    rt_kprintf("DTU_Write > %s \n\n", json_str);
+
+    if (json_str)
+    {
+        free(json_str);
+    }
+
+    return NULL; // 返回的字符串需由调用者释放
+}
+
+/**
+ * @brief 组包返回执行结果
+ *
+ * @param result
+ * @return char* 一定要记得释放指针
+ */
+char *ReportRes(uint8_t result)
+{
+    // 创建根JSON对象
+    cJSON *root = cJSON_CreateObject();
+    if (!root)
+    {
+        rt_kprintf("Failed to create JSON root\n");
+        return NULL;
+    }
+
+    if (strstr(res_c.COMMAND, "00") == NULL)
+    {
+        return NULL;
+    }
+
+    // 添加字段到根对象
+    cJSON_AddStringToObject(root, "DEVICE_SERIAL_NUMBER", device_status.imei);
+    cJSON_AddStringToObject(root, "ACTION_ID", res_c.ACTION_ID);
+    cJSON_AddStringToObject(root, "COMMAND", res_c.COMMAND);
+    GetTiming(res_c.TIMING, sizeof(res_c.TIMING));
+    cJSON_AddStringToObject(root, "TIMING", res_c.TIMING);
+    result ? cJSON_AddStringToObject(root, "RESULT", "SUCC") : cJSON_AddStringToObject(root, "RESULT", "FAIL");
+
+    // 将JSON对象转换为字符串（格式化输出）
+    char *json_str = cJSON_PrintUnformatted(root);
+
+    // 清理cJSON对象
+    cJSON_Delete(root);
+
+    DTU_Write(json_str);
+
+    rt_kprintf("DTU_Write > %s \n\n", json_str);
+
+    if (json_str)
+    {
+        free(json_str);
+    }
+
+    return NULL;
+}
+/**
+ * @brief 回复结果
+ *
+ */
+static void Report_setpara(void)
+{
+    // 创建根JSON对象
+    cJSON *root = cJSON_CreateObject();
+    if (!root)
+    {
+        rt_kprintf("Failed to create JSON root\n");
+        return;
+    }
+
+    if (strstr(res_c.COMMAND, "00") == NULL)
+    {
+        return;
+    }
+
+    // 添加字段到根对象
+    cJSON_AddStringToObject(root, "DEVICE_SERIAL_NUMBER", device_status.imei);
+    cJSON_AddStringToObject(root, "ACTION_ID", res_c.ACTION_ID);
+    cJSON_AddStringToObject(root, "COMMAND", res_c.COMMAND);
+    GetTiming(res_c.TIMING, sizeof(res_c.TIMING));
+    cJSON_AddStringToObject(root, "TIMING", res_c.TIMING);
+    cJSON_AddStringToObject(root, "RESULT", "SUCC");
+
+    cJSON_AddNumberToObject(root, "CONTROL", limit.LuxEN);
+
+    char cache_0[8] = {0};
+    char cache_1[8] = {0};
+    char cache_2[8] = {0};
+
+    sprintf(cache_0, "%d", syscfg.pho_inr_day);
+    sprintf(cache_1, "%d", syscfg.pho_t_hour);
+    sprintf(cache_2, "%d", syscfg.pho_t_min);
+
+    cJSON_AddStringToObject(root, "PHO_INR_DAY", cache_0);
+    cJSON_AddStringToObject(root, "PHO_T_HOUR", cache_1);
+    cJSON_AddStringToObject(root, "PHO_T_MIN", cache_2);
+
+    sprintf(cache_0, "%d", syscfg.dattim);
+
+    cJSON_AddStringToObject(root, "DATT", cache_0);
+
+    // 将JSON对象转换为字符串（格式化输出）
+    char *json_str = cJSON_PrintUnformatted(root);
+
+    // 清理cJSON对象
+    cJSON_Delete(root);
+
+    DTU_Write(json_str);
+
+    rt_kprintf("DTU_Write > %s \n\n", json_str);
+
+    if (json_str)
+    {
+        free(json_str);
+    }
+}
+
+/**
+ * @brief 执行新协议下发的指令 dev_setpara
+ *
+ * @param cmd json字符串
+ */
+static void exe_dev_setpara(char *cmd)
+{
+
+    // 解析JSON根对象
+    cJSON *root = cJSON_Parse(cmd);
+    if (root == NULL)
+    {
+        const char *error_ptr = cJSON_GetErrorPtr();
+        if (error_ptr != NULL)
+        {
+            rt_kprintf("JSON解析错误: %s\n", error_ptr);
+        }
+        return;
+    }
+
+    /**
+     * @brief 应用模式
+     *
+     */
+    cJSON *CONTROL = cJSON_GetObjectItemCaseSensitive(root, "CONTROL");
+    if (CONTROL != NULL)
+    {
+        char temp = cjson_getval(CONTROL);
+        if (temp >= 2)
+        {
+            rt_kprintf("错误的CONTROL: %d\n", temp);
+            cJSON_Delete(root);
+            return;
+        }
+        else
+        {
+            syscfg.en_tigmode = temp;
+            ef_set_env_blob("syscfg", (const char *)&syscfg, sizeof(syscfg));
+            rt_kprintf("Change Workmod %d OK\n", temp);
+            LOG_I("CONTROL: %d\n", temp);
+        }
+    }
+    /**
+     * @brief 开始时间
+     *
+     */
+    cJSON *START_TIME = cJSON_GetObjectItemCaseSensitive(root, "START_TIME");
+    if (cJSON_IsString(START_TIME) && (strlen(START_TIME->valuestring) < 3))
+    {
+
+        char temp = cjson_getval(START_TIME);
+
+        if (temp >= 0 && temp <= 24)
+        {
+            device_status.collecting_sh1 = temp;
+            ef_set_env_blob("collecting_sh1", &device_status.collecting_sh1, sizeof(device_status.collecting_sh1));
+            LOG_I("START_TIME: %s\n", START_TIME->valuestring);
+        }
+        else
+        {
+            LOG_E("时控开始设置错误!!!");
+        }
+    }
+    /**
+     * @brief 结束时间
+     *
+     */
+    cJSON *END_TIME = cJSON_GetObjectItemCaseSensitive(root, "END_TIME");
+    if (cJSON_IsString(END_TIME) && (strlen(START_TIME->valuestring) < 3))
+    {
+
+        char temp = cjson_getval(END_TIME);
+
+        if (temp >= 0 && temp <= 24)
+        {
+            device_status.collecting_eh1 = temp;
+            ef_set_env_blob("collecting_eh1", &device_status.collecting_eh1, sizeof(device_status.collecting_eh1));
+            LOG_I("END_TIME: %s\n", END_TIME->valuestring);
+        }
+        else
+        {
+            LOG_E("时控结束设置错误!!!");
+        }
+    }
+
+    /**
+     * @brief 图片间隔
+     *
+     */
+    cJSON *PHO_T = cJSON_GetObjectItemCaseSensitive(root, "PHO_T");
+    if (cJSON_IsString(PHO_T))
+    {
+
+        char temp = cjson_getval(PHO_T);
+
+        if (temp >= 5 && temp <= 240)
+        {
+            syscfg.photim = temp;
+            ef_set_env_blob("syscfg", &syscfg, sizeof(syscfg));
+            LOG_I("照片上传间隔:%d\n", temp);
+        }
+        else
+        {
+            LOG_E("照片上传间隔设置错误!!!\n");
+        }
+    }
+    /**
+     * @brief 数据间隔
+     *
+     */
+    cJSON *DATT = cJSON_GetObjectItemCaseSensitive(root, "DATT");
+    if (cJSON_IsString(DATT) && (strlen(DATT->valuestring) < 3))
+    {
+        char temp = cjson_getval(DATT);
+
+        if (temp >= 10 && temp <= 120)
+        {
+            syscfg.dattim = temp;
+            ef_set_env_blob("syscfg", &syscfg, sizeof(syscfg));
+            LOG_I("DATT: %s\n", DATT->valuestring);
+        }
+        else
+        {
+            LOG_E("数据上传间隔设置错误!!!\n");
+        }
+    }
+
+    cJSON_Delete(root);
+
+    Report_setpara();
+}
+
+/**
+ * @brief 执行具体的指令 并回复结果
+ *
+ */
+static void execute_NewCmd(char *cmd)
+{
+
+    if (atoi(res_c.COMMAND) > dev_typemax)
+    {
+        rt_kprintf("execute_NewCmd Err %s \n", res_c.COMMAND);
+        return;
+    }
+
+    switch (atoi(res_c.COMMAND))
+    {
+    case dev_on:
+
+        Recode_e_code(e_CMD_list, dev_on, "下发指令执行");
+        device_status.ds = ON;
+        ef_set_env_blob("ds", &device_status.ds, sizeof(device_status.ds));
+
+        ef_get_env_blob("ds", &device_status.ds, sizeof(device_status.ds), NULL);
+        if (device_status.ds == ON)
+        {
+            rt_kprintf("dev_on execute\n");
+            ReportRes(1);
+        }
+        else
+        {
+            ReportRes(0);
+            device_status.ds = ON;
+            ef_set_env_blob("ds", &device_status.ds, sizeof(device_status.ds));
+        }
+
+        break;
+    case dev_off:
+        Recode_e_code(e_CMD_list, dev_off, "下发指令执行");
+        device_status.ds = OFF;
+        ef_set_env_blob("ds", &device_status.ds, sizeof(device_status.ds));
+
+        ef_get_env_blob("ds", &device_status.ds, sizeof(device_status.ds), NULL);
+        if (device_status.ds == OFF)
+        {
+            rt_kprintf("dev_off execute\n");
+            ReportRes(1);
+        }
+        else
+        {
+            ReportRes(0);
+            device_status.ds = OFF;
+            ef_set_env_blob("ds", &device_status.ds, sizeof(device_status.ds));
+        }
+
+        break;
+    case dev_reboot:
+        Recode_e_code(e_CMD_list, dev_reboot, "下发指令执行");
+        ReportRes(1);
+        rt_kprintf("dev_reboot execute\n");
+        rt_hw_cpu_reset();
+        break;
+    case dev_takepho:
+        Recode_e_code(e_CMD_list, dev_takepho, "下发指令执行");
+        jts.takephoto_test = ON;
+        ReportRes(1);
+        rt_kprintf("dev_takepho execute\n");
+
+        break;
+    case dev_sta:
+        Recode_e_code(e_CMD_list, dev_sta, "下发指令执行");
+        rt_kprintf("dev_sta execute\n");
+        makeJson_NEW(1);
+
+        break;
+    case dev_readcfg:
+        Recode_e_code(e_CMD_list, dev_readcfg, "下发指令执行");
+        // rtu进行回复
+        break;
+    case dev_setcfg:
+        Recode_e_code(e_CMD_list, dev_setcfg, "下发指令执行");
+        // rtu进行回复
+        break;
+
+    case dev_setpara:
+        Recode_e_code(e_CMD_list, dev_setpara, "下发指令执行");
+        exe_dev_setpara(cmd);
+        break;
+
+    default:
+        break;
+    }
+}
+
+/**
+ * @brief 解析新协议的指令
+ *
+ * @param cmd 待解析的JSON字符串
+ */
+void prase_NewCmd(char *cmd)
+{
+    // 校验输入有效性
+    if (cmd == NULL)
+    {
+        rt_kprintf("输入字符串为空\n");
+        return;
+    }
+
+    // 解析JSON根对象
+    cJSON *root = cJSON_Parse(cmd);
+    if (root == NULL)
+    {
+        const char *error_ptr = cJSON_GetErrorPtr();
+        if (error_ptr != NULL)
+        {
+            rt_kprintf("JSON解析错误: %s\n", error_ptr);
+        }
+
+        return;
+    }
+
+    // 解析设备序列号
+    cJSON *device_sn = cJSON_GetObjectItemCaseSensitive(root, "DEVICE_SERIAL_NUMBER");
+    if (cJSON_IsString(device_sn) && (device_sn->valuestring != NULL))
+    {
+        rt_kprintf("设备序列号: %s\n", device_sn->valuestring);
+        if (strlen(device_sn->valuestring) != 15)
+        {
+            rt_kprintf("错误的序列号: %s %d\n", device_sn->valuestring, strlen(device_sn->valuestring));
+            cJSON_Delete(root);
+            return;
+        }
+    }
+    else
+    {
+        rt_kprintf("未找到DEVICE_SERIAL_NUMBER字段或类型错误\n");
+        cJSON_Delete(root);
+        return;
+    }
+
+    // 解析指令ID
+    cJSON *action_id = cJSON_GetObjectItemCaseSensitive(root, "ACTION_ID");
+    if (cJSON_IsString(action_id) && (action_id->valuestring != NULL))
+    {
+        rt_kprintf("指令ID: %s\n", action_id->valuestring);
+        sprintf(res_c.ACTION_ID, "%s", action_id->valuestring);
+    }
+    else
+    {
+        rt_kprintf("未找到ACTION_ID字段或类型错误\n");
+    }
+
+    // 解析指令代码
+    cJSON *command = cJSON_GetObjectItemCaseSensitive(root, "COMMAND");
+    if (cJSON_IsString(command) && (command->valuestring != NULL))
+    {
+        rt_kprintf("指令代码: %s\n", command->valuestring);
+        if (atoi(command->valuestring) >= dev_typemax)
+        {
+            rt_kprintf("错误的指令代码: %s\n", command->valuestring);
+        }
+        else
+        {
+            sprintf(res_c.COMMAND, "%s", command->valuestring);
+        }
+    }
+    else
+    {
+        rt_kprintf("未找到COMMAND字段或类型错误\n");
+    }
+
+    // 解析执行时间
+    cJSON *timing = cJSON_GetObjectItemCaseSensitive(root, "TIMING");
+    if (cJSON_IsString(timing) && (timing->valuestring != NULL))
+    {
+        rt_kprintf("执行时间: %s\n", timing->valuestring);
+    }
+    else
+    {
+        rt_kprintf("未找到TIMING字段或类型错误\n");
+    }
+
+    // 释放JSON对象
+    cJSON_Delete(root);
+
+    /***      开始执行具体指令              ***/
+
+    execute_NewCmd(cmd);
+
+    /***      开始执行具体指令              ***/
+}

Application_SY2/applications/protocol.h

@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-03-27     RuoFeng       the first version
+ */
+#ifndef APPLICATIONS_PROTOCOL_H_
+#define APPLICATIONS_PROTOCOL_H_
+
+/*********************↑           declaration           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+
+/*********************↓           define           ↓************************/
+
+
+
+/*********************↑           define           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           include           ↓************************/
+
+#include <cJSON.h>
+
+/*********************↑           include           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           extern           ↓************************/
+
+
+
+/*********************↑           extern           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/********************↓           declaration          ↓***********************/
+
+char *makeJson_NEW(uint8_t type);
+
+
+struct RES_Type
+{
+    char ACTION_ID[22];
+    char COMMAND[6];
+    char TIMING[30];
+    char RESULT[6];
+};
+
+
+typedef enum
+{
+    dev_on = 1,
+    dev_off,
+    dev_reboot,
+    dev_takepho,
+    dev_sta,
+    dev_readcfg,
+    dev_setcfg,
+    dev_setpara,
+    dev_typemax
+} DevCmd_def;
+
+
+void prase_NewCmd(char *cmd);
+
+
+/********************↑           declaration          ↑***********************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓        global variables      ↓************************/
+
+/*********************↑        global variables      ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+
+
+
+
+
+
+
+
+#endif /* APPLICATIONS_PROTOCOL_H_ */

Application_SY2/applications/rs485.h

@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-09-10     RuoFeng       the first version
+ */
+#ifndef APPLICATIONS_RS485_H_
+#define APPLICATIONS_RS485_H_
+
+/*********************↓           define           ↓************************/
+
+#define rs_buf_max 64            // 串口接收缓存
+#define MAX_SENSOR_NUM 6         // 决定处理要素模型条数
+
+
+#define stemp "stemp"
+#define humi "humi"
+#define airpre "airpre"
+#define lux "lux"
+#define rain "rain"
+// #define weight "weight"
+
+/*********************↑           define           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           include           ↓************************/
+
+
+
+/*********************↑           include           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           extern           ↓************************/
+
+
+
+/*********************↑           extern           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/********************↓           declaration          ↓***********************/
+
+typedef struct
+{
+    char eKey[5];               //传感器通道号
+    uint8_t sensor_addr;        //从机地址
+    uint16_t start_reg;         //寄存器起始位置
+    uint8_t count;              //读取寄存器数量
+    uint8_t d_pos;              //数据偏移量
+    int    factor;              //修正因子
+    uint8_t d_length;           //数据长度（单位uint16）
+    int32_t value;             //传感器数值
+    char eName[15];             //传感器名称
+    char eValue[10];            //传感器字符串形式数据
+//    char eNum[5];               //服务器端 传感器代号
+    uint8_t cfged;              //参数已配置
+    uint8_t online;             //是否在线
+//    uint8_t en_corr;            //是否使能要素修正
+//    int16_t plus;               // +
+//    int16_t minus;              // -
+//    int16_t times;              // *
+//    int16_t divide;             // /
+}Sensor;
+
+
+typedef enum
+{
+    s_Temp = 0,
+    s_Humi  ,
+    s_Airpre,
+    s_Lux ,
+    s_Rain  ,
+    s_weight,
+    s_ALL   ,
+    s_TypeMAX
+}Sensor_Read_Type;
+
+
+void RS485_SEND(uint8_t *buf, uint16_t size);
+Sensor_Read_Type get_sensor_num(char *cmd);
+int8_t READ_MODBUS_DATA_1(Sensor_Read_Type srt);
+
+
+/********************↑           declaration          ↑***********************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓        global variables      ↓************************/
+
+
+
+
+/*********************↑        global variables      ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+
+
+
+#endif /* APPLICATIONS_RS485_H_ */

Application_SY2/applications/sht30_collect.c

@@ -0,0 +1,679 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-23     Administrator       the first version
+ */
+#include <rtthread.h>
+#include <board.h>
+#include <sht3x.h>
+#include "sht30_collect.h"
+#include <string.h>
+#include <stdio.h>
+#include "control.h"
+#include "hmi.h"
+#include "math.h"
+#include "test.h"
+#define DBG_ENABLE
+#define DBG_COLOR
+#define DBG_TAG "control"
+#define DBG_LEVEL DBG_LOG
+#include <rtdbg.h> //must after of DBG_LVL, DBG_TAG or other options
+
+// 温湿度
+#define THREAD_PRIORITY 21     // 线程优先级
+#define THREAD_STACK_SIZE 1024 // 栈大小
+#define THREAD_TIMESLICE 5     // 时间片
+// 电压，电流
+#define P_THREAD_PRIORITY 13     // 线程优先级
+#define P_THREAD_STACK_SIZE 1024 // 栈大小
+#define P_THREAD_TIMESCLICE 5    // 时间片
+// ADC
+#define ADC_DEV_NAME "adc1"             /*ADC设备名称*/
+#define ADC_DEV_CHANNLE_0 0 /*ADC通道*/ // 电压
+#define ADC_DEV_CHANNLE_1 1 /*ADC通道*/ // 电流
+#define ADC_DEV_CHANNLE_2 10            /*光控*/
+#define ADC_DEV_CHANNLE_3 11 /*雨控*/   // 现在只有一个adc 给雨控用吧 小虫体可以用光照度传感器
+#define ADC_DEV_CHANNLE_4 12            /*加热仓温度*/
+#define ADC_DEV_CHANNLE_5 13            /*保险丝之后的电压*/
+#define ADC_DEV_CHANNLE_6 16            /*内部温度传感器*/
+#define REFER_VOLTAGE 330               /* 参考电压 3.3V,数据精度乘以100保留2位小数*/
+#define CONVERT_BITS (1 << 12)          /* 转换位数为12位 */
+
+Device_Status_typedef device_status;
+
+rt_device_t serial_485;                                             /*串口设备句柄*/
+struct serial_configure uart_config_485 = RT_SERIAL_CONFIG_DEFAULT; /*初始化配置参数*/
+
+rt_uint32_t adc0_value, adc1_value, in_adc_17, adc13_value, adc16_value;
+rt_uint32_t adc10_rain, adc11_light, adc12_ntc;
+int8_t hum_value, tem_value;
+
+static rt_thread_t tid1 = RT_NULL;
+static rt_thread_t tid2 = RT_NULL;
+
+ADC_HandleTypeDef hadc1;
+
+int32_t Read_Filtered_Current(void);
+/*串口初始化*/
+int UART_485_INIT(void)
+{
+    serial_485 = rt_device_find(UART_485);
+    /*修改串口配置参数*/
+    uart_config_485.baud_rate = BAUD_RATE_9600; // 修改波特率9600
+    uart_config_485.data_bits = DATA_BITS_8;    // 数据位8
+    uart_config_485.stop_bits = STOP_BITS_1;    // 停止位1
+    uart_config_485.bufsz = 512;                // 缓冲区1k
+    uart_config_485.parity = PARITY_NONE;       // 奇校验
+    /* step3：控制串口设备。通过控制接口传入命令控制字，与控制参数 */
+    rt_device_control(serial_485, RT_DEVICE_CTRL_CONFIG, &uart_config_485);
+    /* step4：打开串口设备。以DMA接收及轮询发送模式打开串口设备 */
+    rt_device_open(serial_485, RT_DEVICE_FLAG_INT_RX);
+    return 0;
+}
+
+/* 入口函数 */
+static void sht30_collect_thread_entry(void *parameter)
+{
+
+    sht3x_device_t sht3x_device;
+    static int checklightnum = 0;
+    static int checknightnum = 0;
+    sht3x_device = sht3x_init("i2c1", 0x44);
+    // 此处需要短暂的延时，否则会出现连续读取失败的问题
+    rt_thread_mdelay(150);
+
+    uint16_t log_en_inr = 30; // 打印log的速度 数值越小 打印越频繁
+    static int16_t log_en_cnt = -1;
+
+    while (1)
+    {
+        if (sht3x_device)
+        {
+            if (RT_EOK == sht3x_read_singleshot(sht3x_device))
+            {
+                hum_value = sht3x_device->humidity;
+                tem_value = sht3x_device->temperature;
+                if (hum_value != 0)
+                {
+                    rt_sprintf(device_status.humidity, "%d.%d", (int)sht3x_device->humidity, (uint)(sht3x_device->humidity * 10) % 10);
+                    rt_sprintf(device_status.tempture, "%d.%d", (int)sht3x_device->temperature, (uint)(sht3x_device->temperature * 10) % 10);
+                }
+                else
+                {
+                    rt_kprintf("sht3x_read_singleshot eRR:%d", hum_value);
+                }
+            }
+            else
+            {
+                sht3x_softreset(sht3x_device);
+            }
+            ////          rt_kprintf("sht30 humidity   : %d.%d  ", (int)sht3x_device->humidity, (int)(sht3x_device->humidity * 10) % 10);
+            ////          rt_kprintf("temperature: %d.%d\n", (int)sht3x_device->temperature, (int)(sht3x_device->temperature * 10) % 10);
+        }
+        else
+        {
+
+            rt_kprintf("read sht3x fail.\r\n");
+            // 重新初始化
+            sht3x_deinit(sht3x_device);
+            sht3x_device = sht3x_init("i2c1", 0x44);
+            rt_thread_mdelay(150);
+        }
+        if (Read_Light_Voltage() > 500)
+        {
+            checklightnum++;
+            if (checklightnum == 20)
+            {
+                device_status.sun_status = 1;
+                checklightnum = 0;
+            }
+        }
+        else
+        {
+            checknightnum++;
+            if (checknightnum == 20)
+            {
+                device_status.sun_status = 0;
+                checknightnum = 0;
+            }
+        }
+        // 温控
+        //        if (atoi(device_status.tempture) >= device_status.tph || atoi(device_status.tempture) <= device_status.tpl)
+        //        {
+        //            device_status.temp_status = 1;
+        //        }
+        //        else if (atoi(device_status.tempture) >= (device_status.tpl + 5) && atoi(device_status.tempture) <= (device_status.tph - 10))
+        //        {
+        //            device_status.temp_status = 0;
+        //        }
+        if (chk_log_time)
+        {
+            LOG_I("光控计数:%d-%d", checklightnum, checknightnum);
+        }
+        rt_thread_mdelay(5000);
+    }
+}
+
+/**
+ * @brief 250411 适配新的电流采集芯片
+ *
+ */
+// 定义滑动平均滤波器结构体
+typedef struct
+{
+    rt_uint16_t *buffer;
+    int bufferSize;
+    int currentIndex;
+    rt_uint16_t sum;
+} MovingAverageFilter;
+
+// 初始化滑动平均滤波器
+MovingAverageFilter *moving_average_filter_init(int size)
+{
+    MovingAverageFilter *filter = (MovingAverageFilter *)malloc(sizeof(MovingAverageFilter));
+    if (filter == NULL)
+    {
+        return NULL;
+    }
+
+    filter->buffer = (rt_uint16_t *)calloc(size, sizeof(rt_uint16_t));
+    if (filter->buffer == NULL)
+    {
+        free(filter);
+        return NULL;
+    }
+
+    filter->bufferSize = size;
+    filter->currentIndex = 0;
+    filter->sum = 0.0;
+
+    return filter;
+}
+
+// 更新滑动平均滤波器
+rt_uint16_t moving_average_filter_update(MovingAverageFilter *filter, rt_uint16_t newValue)
+{
+    filter->sum -= filter->buffer[filter->currentIndex];
+    filter->buffer[filter->currentIndex] = newValue;
+    filter->sum += newValue;
+    filter->currentIndex = (filter->currentIndex + 1) % filter->bufferSize;
+    return filter->sum / filter->bufferSize;
+}
+
+// 释放滑动平均滤波器资源
+void moving_average_filter_free(MovingAverageFilter *filter)
+{
+    if (filter != NULL)
+    {
+        free(filter->buffer);
+        free(filter);
+    }
+}
+/**
+ * @brief 电流读取
+ *
+ * @param parameter
+ */
+static void Power_ReadCheck(void *parameter)
+{
+    int rain_cnt = 0;
+    //int bat_cnt = 0;
+    int RV;
+    //MovingAverageFilter *filter = moving_average_filter_init(10);
+    // MovingAverageFilter* filter_hi = moving_average_filter_init(10);
+    MovingAverageFilter *filter_v = moving_average_filter_init(10);
+    rt_thread_mdelay(1000);
+    while (1)
+    {
+        //rt_kprintf("Read_Filtered_Current() > %d \n", Read_Filtered_Current());
+        // #if PCB_V1 == 0
+        //         rt_uint16_t _24v_current_int = moving_average_filter_update(filter, Read_Real_Current());
+        //         if (_24v_current_int - 2430 > 0)
+        //         {
+        //             sprintf(device_status.power, "%.2f", (float)(_24v_current_int - 2430) / 0.4);
+        //         }
+        //         else
+        //         {
+        //             sprintf(device_status.power, "0.0");
+        //         }
+        // #else
+        //         rt_uint16_t _24v_current_int = moving_average_filter_update(filter,Read_Real_Current());
+        //         sprintf(device_status.power,"%.2f",(float)_24v_current_int/10);
+        sprintf(device_status.power, "%d", Read_Filtered_Current());
+        // #endif
+        //LOG_I("负载电流:%s", device_status.power);
+        if ((Read_Real_Voltage() / 10) < 105) // 设备状态低于10.5 欠压保护 此处需要在屏幕明显位置进行提示
+        {
+            // 关闭外设
+            // ctr_photo(OFF); // 关闭相机供电
+            rt_kprintf("detact low volage %d.%d\n", Read_Real_Voltage() / 100, Read_Real_Voltage() % 100);
+            // ctr_led(OFF);   // 关闭补光灯
+            device_status.bat_status = 0;
+        }
+        else
+        {
+            //rt_kprintf("Read_Real_Voltage() / 10 < 105 >>> %d \n" , Read_Real_Voltage() / 10);
+            device_status.bat_status = 1;
+        }
+
+        RV = 10000 * (4096 - Read_Ntc_Voltage()) / Read_Ntc_Voltage();
+        if (TempCalculate(RV, 3950, 10000) - TempCalculate(RV, 3950, 10000) > 10)
+        {
+            LOG_E("temp value err!!!!");
+        }
+        else
+        {
+            device_status.heattem = TempCalculate(RV, 3950, 10000);
+            if (device_status.heattem > 160)
+            {
+                device_status.heattem = 25;
+            }
+        }
+
+        // rt_kprintf("Read_Rain_Voltage > %d\n" , Read_Rain_Voltage());
+
+        // 雨控
+        if (Read_Rain_Voltage() > 250)
+        {
+            device_status.C01 |= (1 << 5);
+            device_status.rain_update = 1;
+            ctr_lamp(OFF, 1);
+            ctr_lamp(OFF, 2);
+            ctr_lamp(OFF, 3);
+            rain_cnt = 0;
+            LOG_W("雨控状态触发\n");
+        }
+//        else if (device_status.rain_status)
+//        {
+//            rain_cnt++;
+//            if(Read_Rain_Voltage() < 250)
+//            {
+//                rain_cnt++;
+//                if(rain_cnt >= 10 * 4)
+//                {
+//                    device_status.rain_status = 0;
+//                    LOG_I("雨控状态恢复\n");
+//                    rain_cnt = 0;
+//                }
+//            }
+//            else
+//            {
+//                rain_cnt = 0;
+//            }
+//        }
+
+
+        // rt_sprintf(device_status.voltage,"%d.%02d",filter_voltage()/100,filter_voltage()%100);
+        rt_uint16_t in_voltage_int = moving_average_filter_update(filter_v, Read_Real_Voltage());
+        sprintf(device_status.voltage, "%d.%02d", in_voltage_int / 100, in_voltage_int % 100);
+        // LOG_D("voltage is:%sV",device_status.voltage);
+        sprintf(device_status.fuse_voltage, "%d.%02d", Read_Fuse_Voltage() / 100, Read_Fuse_Voltage() % 100);
+        rt_thread_mdelay(10);
+    }
+}
+/**
+ * @brief 250411 适配新的电流采集芯片
+ *
+ */
+
+
+/**
+ *
+ * @return 250411 修改电流采集函数 过去的太为杂乱
+ *
+ *
+ */
+
+// ADC参数
+#define ADC_MAX 4095u       // 12位ADC最大值
+#define VREF_ADC_MV 3300    // ADC参考电压（单位：mV）
+#define DIVIDER_RATIO_NUM 2 // 分压比分子
+#define DIVIDER_RATIO_DEN 3 // 分压比分母
+
+// 传感器参数
+#define V_SUPPLY_MV 5100              // 传感器供电电压（单位：mV）// 先不要动这个
+#define V_OFFSET_MV (V_SUPPLY_MV / 2) // 零点电压（2755mV）
+#define SENSITIVITY_MA 100            // 灵敏度（0.1V/A → 100mV/A）
+//#define SENSITIVITY_MA  400        // 灵敏度（0.4V/A → 400mV/A，对应±5A） 若修改为5A芯片 用这个
+
+// 低通滤波参数（α=0.2，整数运算实现）
+#define FILTER_ALPHA 1 // α分子（α = 1/5 = 0.2）
+#define FILTER_BETA 4  // β分母（β = 1 - α = 4/5）
+
+// 250603 新
+
+// 硬件参数定义
+#define VCC 5000     // 电源电压5V (使用mV单位)
+#define ADC_REF 3300 // STM32 ADC参考电压3.3V (mV)
+#define ADC_RES 4095 // 12位ADC分辨率
+
+// 分压电阻参数 (放大1000倍避免浮点)
+#define R1 10000            // 10K上拉电阻
+#define R2 20000            // 20K下拉电阻
+#define RATIO_NUM (R1 + R2) // 分子
+#define RATIO_DEN R2        // 分母
+
+// 芯片选择（取消注释切换量程）
+#define CC6900_5A
+// #define CC6900_10A
+
+#ifdef CC6900_5A
+#define SENSITIVITY 400    // 5A芯片灵敏度(mV/A)
+#define CURRENT_RANGE 5000 // 5A量程(mA)
+#else
+#define SENSITIVITY 200     // 10A芯片灵敏度(mV/A)
+#define CURRENT_RANGE 10000 // 10A量程(mA)
+#endif
+
+// 精度放大因子 (Q10格式，放大1024倍)
+#define SCALE_FACTOR 1024
+
+/**
+ * @brief 将ADC值转换为电流值(mA) - 定点数版本
+ * @param adcValue ADC读取的原始值(0-4095)
+ * @return 电流值(mA)，正值表示正向电流，负值表示反向电流
+ */
+int32_t ADC_to_Current_FixedPoint(uint16_t adcValue)
+{
+
+    // rt_kprintf("adc >>> %d \n" , adcValue);
+    //  1. 计算ADC电压 (mV) = adcValue * ADC_REF / ADC_RES
+    uint32_t adcVoltage = ((uint32_t)adcValue * ADC_REF) / ADC_RES;
+
+    // 2. 计算VOUT实际电压 (mV) = adcVoltage * (R1+R2)/R2
+    uint32_t vout = (adcVoltage * RATIO_NUM) / RATIO_DEN;
+
+    // 3. 计算相对于VCC/2的电压差 (mV)
+    int32_t voltageDiff = (int32_t)vout - (VCC / 2);
+
+    // 4. 计算电流 (mA) = (voltageDiff * 1000) / SENSITIVITY
+    // 使用SCALE_FACTOR保持精度，最后再除回去
+    int32_t current = (voltageDiff * 1000 * SCALE_FACTOR) / SENSITIVITY;
+
+    // 5. 移除缩放因子并返回
+    return current / SCALE_FACTOR;
+}
+
+// 250603 新
+
+/**
+ * @brief 读取并滤波后的电流值（单位：mA，整数）
+ * @return int32_t 滤波后的电流值
+ */
+int32_t Read_Filtered_Current(void)
+{
+    static int32_t filtered_current = 0; // 静态变量保存滤波结果
+
+    // 1. 读取原始电流值
+    int32_t raw_current = ADC_to_Current_FixedPoint(Read_Real_Current());
+
+    // rt_kprintf("raw_current >>> %d \n" , raw_current);
+
+    // 2. 一阶低通滤波（整数运算）
+    // 公式：filtered = (α * raw + β * filtered_prev) / (α + β)
+    filtered_current = (FILTER_ALPHA * raw_current + FILTER_BETA * filtered_current) /
+                       (FILTER_ALPHA + FILTER_BETA);
+
+    filtered_current = abs(filtered_current);
+
+    return filtered_current;
+}
+/*读取电流值*/
+int Read_Real_Current(void)
+{
+    rt_adc_device_t adc_dev; /*ADC设备句柄*/
+    adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
+    if (adc_dev == RT_NULL)
+    {
+        LOG_E("adc sample run failed! can't find %s device!", ADC_DEV_NAME);
+        return RT_ERROR; // adc 采样值不可能为负值，返回负值表示出错
+    }
+    HAL_ADCEx_Calibration_Start(adc_dev->parent.user_data);
+    rt_adc_enable(adc_dev, ADC_DEV_CHANNLE_1);
+    // rt_adc_enable(adc_dev, 17);
+    adc1_value = filter_Mid(rt_adc_read(adc_dev, ADC_DEV_CHANNLE_1));
+    in_adc_17 = filter_Mid(rt_adc_read(adc_dev, 17));
+    /* 关闭通道 */
+    rt_adc_disable(adc_dev, ADC_DEV_CHANNLE_1);
+    // rt_adc_disable(adc_dev, 17);
+    // rt_kprintf("read in adc:ADC17:%d-ADC1:%d\n",in_adc_17,adc1_value);
+    return adc1_value;
+}
+
+/**
+ *
+ * @return 250411 修改电流采集函数 过去的太为杂乱
+ *
+ *
+ */
+
+/*
+ * https://blog.csdn.net/loop222/article/details/120497425
+采样电阻0.01 Ω
+运放为INA240A2，放大倍数50
+背面需分别短接A0/A2至输出
+C1_OUT=INA_VCC/2 + 0.01 * I * 50
+如果INA_VCC=3.3V，C1_OUT=1.65 + 0.01 * I * 50，电流范围（-3.3A,3.3A）
+如果INA_VCC=5.0V，C1_OUT=2.50 + 0.01 * I * 50，电流范围（-5A,5A）
+B相采样输入在PCB上为走线方便做了反向输入，所以放大倍数需乘以 -1（移植后的代码已经做了处理）
+*/
+/*读取电压值*/
+int Read_Real_Voltage(void)
+{
+    rt_adc_device_t adc_dev; /*ADC设备句柄*/
+    adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
+    if (adc_dev == RT_NULL)
+    {
+        rt_kprintf("adc sample run failed! can't find %s device!\n", ADC_DEV_NAME);
+        return RT_ERROR; // adc 采样值不可能为负值，返回负值表示出错
+    }
+    HAL_ADCEx_Calibration_Start(adc_dev->parent.user_data);
+    rt_adc_enable(adc_dev, ADC_DEV_CHANNLE_0);
+
+    // adc0_value = rt_adc_read(adc_dev, ADC_DEV_CHANNLE_0);
+    adc0_value = filter_Mid(rt_adc_read(adc_dev, ADC_DEV_CHANNLE_0));
+    /* 关闭通道 */
+    rt_adc_disable(adc_dev, ADC_DEV_CHANNLE_0);
+    return (adc0_value * REFER_VOLTAGE / CONVERT_BITS * 12 + 20);
+}
+/*读取保险丝的电压值*/
+int Read_Fuse_Voltage(void)
+{
+    rt_adc_device_t adc_dev; /*ADC设备句柄*/
+    adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
+    if (adc_dev == RT_NULL)
+    {
+        rt_kprintf("adc sample run failed! can't find %s device!\n", ADC_DEV_NAME);
+        return RT_ERROR; // adc 采样值不可能为负值，返回负值表示出错
+    }
+    HAL_ADCEx_Calibration_Start(adc_dev->parent.user_data);
+    rt_adc_enable(adc_dev, ADC_DEV_CHANNLE_5);
+    adc13_value = rt_adc_read(adc_dev, ADC_DEV_CHANNLE_5);
+    /* 关闭通道 */
+    rt_adc_disable(adc_dev, ADC_DEV_CHANNLE_5);
+    return (adc13_value * REFER_VOLTAGE / CONVERT_BITS * 12 + 8);
+}
+/*读取雨控*/
+int Read_Rain_Voltage(void)
+{
+    rt_adc_device_t adc_dev; /*ADC设备句柄*/
+    adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
+    if (adc_dev == RT_NULL)
+    {
+        rt_kprintf("adc sample run failed! can't find %s device!\n", ADC_DEV_NAME);
+        return RT_ERROR; // adc 采样值不可能为负值，返回负值表示出错
+    }
+    rt_adc_enable(adc_dev, ADC_DEV_CHANNLE_3);
+    adc11_light = rt_adc_read(adc_dev, ADC_DEV_CHANNLE_3);
+    rt_adc_disable(adc_dev, ADC_DEV_CHANNLE_3);
+    HAL_ADCEx_Calibration_Start(adc_dev->parent.user_data);
+    // LOG_D("read rain value:%d",adc11_light);
+    return adc11_light;
+    //    rt_pin_mode(RAIN_PIN,PIN_MODE_INPUT);
+    //    return rt_pin_read(RAIN_PIN);
+}
+/*读取光控*/
+int Read_Light_Voltage(void)
+{
+    rt_adc_device_t adc_dev; /*ADC设备句柄*/
+    adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
+    if (adc_dev == RT_NULL)
+    {
+        rt_kprintf("adc sample run failed! can't find %s device!\n", ADC_DEV_NAME);
+        return RT_ERROR; // adc 采样值不可能为负值，返回负值表示出错
+    }
+    rt_adc_enable(adc_dev, ADC_DEV_CHANNLE_2);
+    adc10_rain = rt_adc_read(adc_dev, ADC_DEV_CHANNLE_2);
+    rt_adc_disable(adc_dev, ADC_DEV_CHANNLE_2);
+    HAL_ADCEx_Calibration_Start(adc_dev->parent.user_data);
+    // rt_kprintf("read light value:%d\n",adc10_rain);
+    return adc10_rain;
+}
+// 获取内部温度传感器值
+short Get_Temprate(void)
+{
+    short result;
+    double temperate;
+    rt_adc_device_t adc_dev; /*ADC设备句柄*/
+    adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
+    if (adc_dev == RT_NULL)
+    {
+        rt_kprintf("adc sample run failed! can't find %s device!\n", ADC_DEV_NAME);
+        return RT_ERROR; // adc 采样值不可能为负值，返回负值表示出错
+    }
+    HAL_ADCEx_Calibration_Start(adc_dev->parent.user_data);
+    rt_adc_enable(adc_dev, ADC_DEV_CHANNLE_6);
+    adc16_value = rt_adc_read(adc_dev, ADC_DEV_CHANNLE_6);
+    /* 关闭通道 */
+    rt_adc_disable(adc_dev, ADC_DEV_CHANNLE_6);
+    temperate = (float)adc16_value * (3.3 / 4096); // 电压值
+    temperate = (1.43 - temperate) / 0.0043 + 25;  // 转换为温度值
+    result = temperate *= 100;                     // 扩大100倍.
+    return result;
+}
+/**
+ * Rv:  热敏电阻当前阻值
+ * B:   热敏电阻参数B值
+ * Revise:  校正温度
+ * BasicRx:  热敏电阻25度时电阻（标称电阻数值）
+ * 返回： 摄氏度
+ */
+int TempCalculate(float Rv, int B, int BasicRx)
+{
+    float Rx;
+
+    Rx = Rv * 1.0 / BasicRx;
+
+    Rx = log(Rx);
+
+    Rx = Rx / B;
+    Rx = 1 / (Rx + 0.003354);
+    // Rx = Rx + 0.003356;
+    // Rx = 1 / Rx;
+    Rx = Rx - 273.13;
+    return (int)(Rx + 0.5);
+}
+/*
+ * 中位值平均滤波法
+ * */
+unsigned int filter_Mid(int adc_return)
+{
+    unsigned char count, i, j;
+    unsigned int value_buf[N], temp = 0;
+    int sum = 0;
+    for (count = 0; count < N; count++)
+    {
+        value_buf[count] = adc_return;
+        // rt_kprintf("value_buf:%d-%d\n",value_buf[count],count);
+        rt_thread_delay(10);
+    }
+    for (j = 0; j < N - 1; j++)
+    {
+        for (i = 0; i < N - j - 1; i++)
+        {
+            if (value_buf[i] > value_buf[i + 1])
+            {
+                temp = value_buf[i];
+                value_buf[i] = value_buf[i + 1];
+                value_buf[i + 1] = temp;
+            }
+        }
+    }
+    for (count = 1; count < N - 1; count++)
+    {
+        sum += value_buf[count];
+    }
+    return (int)(sum / (N - 2));
+}
+/*
+限幅消抖滤波法
+A、方法：
+相当于“限幅滤波法”+“消抖滤波法”
+先限幅,后消抖
+B、优点：
+继承了“限幅”和“消抖”的优点
+改进了“消抖滤波法”中的某些缺陷,避免将干扰值导入系统
+C、缺点：
+对于快速变化的参数不宜
+*/
+unsigned int filter_voltage(void)
+{
+    uint8_t data_cnt = 0;
+    int value = 0, new_value = 0;
+    new_value = Read_Real_Voltage();
+    while (value != new_value)
+    {
+        data_cnt++;
+        if (data_cnt >= N)
+            return new_value;
+        rt_thread_delay(10);
+        new_value = Read_Real_Voltage();
+    }
+    return value;
+}
+/*读取加热仓温度*/
+int Read_Ntc_Voltage(void)
+{
+    rt_adc_device_t adc_dev; /*ADC设备句柄*/
+    adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
+    if (adc_dev == RT_NULL)
+    {
+        rt_kprintf("adc sample run failed! can't find %s device!\n", ADC_DEV_NAME);
+        return RT_ERROR; // adc 采样值不可能为负值，返回负值表示出错
+    }
+    rt_adc_enable(adc_dev, ADC_DEV_CHANNLE_4);
+    adc12_ntc = filter_Mid(rt_adc_read(adc_dev, ADC_DEV_CHANNLE_4));
+    // LOG_D("Read_Ntc_Voltage:%d",adc12_ntc);
+    rt_adc_disable(adc_dev, ADC_DEV_CHANNLE_4);
+    HAL_ADCEx_Calibration_Start(adc_dev->parent.user_data);
+    return adc12_ntc;
+}
+
+/* 创建线程 */
+int sht30_collect(void)
+{
+    /* 创建线程*/
+    //tid1 = rt_thread_create("sht30_collect_thread", sht30_collect_thread_entry, RT_NULL, THREAD_STACK_SIZE, THREAD_PRIORITY, THREAD_TIMESLICE);
+    tid2 = rt_thread_create("Power Check thread", Power_ReadCheck, RT_NULL, P_THREAD_STACK_SIZE + 512, P_THREAD_PRIORITY, P_THREAD_TIMESCLICE);
+    /* 如果获得线程控制块，启动这个线程 */
+//    if (tid1 != RT_NULL)
+//        rt_thread_startup(tid1);
+    if (tid2 != RT_NULL)
+        rt_thread_startup(tid2);
+    return 0;
+}
+// 控制台打印传感器信息
+void Msh_DisplaySensor(void)
+{
+    rt_kprintf("温度：%d\n", tem_value);
+    rt_kprintf("湿度：%d\n", hum_value);
+    rt_kprintf("电压：%s\n", device_status.voltage);
+    rt_kprintf("电流：%s\n", device_status.power);
+}
+MSH_CMD_EXPORT(Msh_DisplaySensor, Msh_DisplaySensor);
+MSH_CMD_EXPORT(Read_Rain_Voltage, Read_Rain_Voltage);
+MSH_CMD_EXPORT(Read_Light_Voltage, Read_Light_Voltage);

Application_SY2/applications/sht30_collect.h

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-28     Administrator       the first version
+ */
+#ifndef APPLICATIONS_INC_SHT30_COLLECT_H_
+#define APPLICATIONS_INC_SHT30_COLLECT_H_
+#define ADC_VOL_BASE                            1.20 //ADC内部电压基准，后续版本可改为针对每一块板子实际测量后写入 flash
+#define N 11        //adc采样计算次数
+#define UART_485 "uart5"  /*串口设备名称*/
+
+
+extern rt_uint32_t voltage,current;
+extern int8_t hum_value,tem_value;
+int UART_485_INIT(void);
+int Read_Real_Current(void);
+int Read_Real_Voltage(void);
+int Read_Fuse_Voltage(void);
+int Read_Rain_Voltage(void);
+int Read_Light_Voltage(void);
+int sht30_collect(void);
+int Read_Ntc_Voltage(void);
+int TempCalculate(float Rv,int B,int BasicRx);
+short Get_Temprate(void);
+unsigned int filter_Mid(int adc_return);
+unsigned int filter_voltage(void);
+#endif /* APPLICATIONS_INC_SHT30_COLLECT_H_ */
+
+//STM32之ADC(内部基准电压，参考电压）
+//https://www.cnblogs.com/jieruishu/p/9023811.html

Application_SY2/applications/sound.c

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-13     Administrator       the first version
+ */
+#include <rtthread.h>
+#include "hmi.h"
+#include <board.h>
+#include <rtdevice.h>
+#include  "stdarg.h"
+#include  "string.h"
+#include "sound.h"
+#include <dtu_uart2.h>
+
+void MA_save(void)
+{
+    HMI_WRITE("play %d,%d,%d",1,4,0);
+    DTU_Write("save");
+}

Application_SY2/applications/sound.h

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-13     Administrator       the first version
+ */
+#ifndef APPLICATIONS_INC_SOUND_H_
+#define APPLICATIONS_INC_SOUND_H_
+
+
+
+
+/*button.mp3
+ * photo.mp3
+ * poweron.mp3
+ * reset.mp3
+ * save.mp3
+ * upload.mp3
+ * workdone.mp3
+ * workstart.mp3
+ * */
+
+
+
+
+void MA_save(void);
+
+
+
+#endif /* APPLICATIONS_INC_SOUND_H_ */

Application_SY2/applications/test.h

@@ -0,0 +1,274 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-05-30     RuoFeng       the first version
+ */
+#ifndef APPLICATIONS_TEST_H_
+#define APPLICATIONS_TEST_H_
+
+/*********************↓           define           ↓************************/
+
+#define ecodesize sizeof(Record)
+#define MAX_e_code_NUM (LOG_AREA_SIZE / ecodesize) // 异常码最大保存值 这个板子给的空间太小 存个20吧
+
+/*********************↑           define           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           include           ↓************************/
+
+#include "stdio.h"
+#include "string.h"
+
+/*********************↑           include           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓           extern           ↓************************/
+
+/*********************↑           extern           ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/********************↓           declaration          ↓***********************/
+typedef struct
+{
+    uint32_t Time_Stampe; // 时间戳
+    uint16_t code;         // 异常码
+    uint16_t para;         // 附带参数
+    uint32_t num;         // 序号
+    char detail[52];      // 内容
+} Record;
+
+typedef enum
+{
+    e_reboot = 1,
+    e_current_0,
+    e_fan_err,
+    e_limit_tape_err,
+    e_limit_up_err,
+    e_limit_down_err,
+    e_ResetRunStaManual,
+    e_jump_collA,
+    e_jump_collB,
+    e_set_rs_RESET,      // 0-流程中 1-手动指令 2-异常工作状态
+    e_set_rs_COLL_A,     // 0-流程中
+    e_set_rs_COLL_B,     // 0-流程中 1-过期跳过 2-coll校验失败
+    e_set_rs_Tape_Move,  // 0-流程中 1-过期跳过 2-coll校验失败
+    e_set_rs_Press_Tape, // 0-流程中 1-coll校验失败
+    e_set_rs_Take_Photo, // 0-流程中
+    e_cam_offline,       // 对焦拍照时相机未连接 1-流程中 2-手动测试
+    e_StepUp_Fail,       // 步进上行超时
+    e_StepDown_Fail,     // 步进下行超时
+    e_AutoTest,
+    /***  一键测试
+     * 0-开始
+
+     * */
+    e_TestLed,
+    e_TapeTest,         // 0-开始 1-手动退出 2-执行完毕退出
+    e_TakePhoto,        // 执行一次
+    e_Collect,          // 0-开始 1-结束
+    e_Traplamp,         // 0-开始 1-结束
+    e_SwitchDown,       // 0-开始 1-结束
+    e_TestFB,           // 0-开始 1-结束
+    e_ReWorkDay,        // 今日结束
+    e_Reboot,           // 10秒前设备开机
+    e_clearecode,       // ecode空间回收
+    e_getin_luxwork,    // 光控工作开始
+    e_getout_luxwork,   // 光控工作结束
+    e_exit_luxwork,     // 光控工作退出
+    e_update,           // 升级相关
+    e_cam_timeout,      // 图像传输超时
+    e_rtu_net_fail,     // rtu网络错误
+    e_work_time_err,    // Work Time Setdef
+    e_manual_mode,      // 手动触发模式
+    e_demo_mode,        // 演示模式
+    e_CMD_list,         // 指令操作记录
+    e_rain_tig,         // 雨控触发记录
+    e_rtc_fail,         // 时间异常
+    e_rtu_fail,         // rtu无法正常通信
+    e_CNT_RESET,        // 清空胶带计数
+    e_Hk_Take_io,       // 记录拍照
+    e_work_mode_pkg,    // 记录工作包
+    e_typeMAX
+} ecode_list;
+
+/***********    测试相关参数    ************/
+
+typedef enum
+{
+    tt_auto = 0,
+    tt_takephoto,
+    tt_collect,
+    tt_Traplamp,
+    tt_fb_test,
+    tt_switchled,
+    tt_scm,
+    tt_typemax
+} JD_Test_Type;
+
+typedef struct
+{
+    uint8_t autotest;
+    uint8_t collect_test;
+    uint8_t takephoto_test;
+    uint8_t traplamp_test;
+    uint8_t switchled_test;
+    uint8_t FBtest;
+    uint8_t scm_test;
+} JD_Test_Sta;
+
+typedef enum // 传输该按钮的活动状态
+{
+    tig_OFF = 0, // 触发状态为失效
+    tig_ON       // 触发状态为生效
+} ts_def;
+
+typedef enum // 传输该按钮的活动状态
+{
+    rs_normal = 0,
+    rs_force
+} rs_def;
+
+typedef struct
+{
+    ts_def autotest_t;
+    ts_def collect_t;
+    ts_def takephoto_t;
+    ts_def traplamp_t;
+    ts_def switchled_t;
+    ts_def fb_test_t;
+    ts_def scm_test_t;
+} Reflash_test_sta;
+
+typedef enum // 拍照测试的类型
+{
+    jt_auto = 0,
+    jt_aftake,
+    jt_takenow,
+    jt_typemax
+} bjt_def;
+
+typedef enum // 步进电机运动的类型
+{
+    cm_upstart = 0,
+    cm_upstop,
+    cm_downstart,
+    cm_downstop,
+    cm_typemax
+} cm_def;
+
+typedef enum
+{
+    le_limit_tape = 0,
+    le_limit_up,
+    le_limlt_dowm,
+    le_typemax
+} le_def;
+
+typedef struct
+{
+    RTC_DateTypeDef *date;
+    RTC_TimeTypeDef *time;
+    uint8_t code;
+    uint8_t para;
+    uint8_t a;
+    uint8_t b;
+} se_modle;
+
+/***********    测试相关参数    ************/
+
+void HMI_WRITE_Force(char *fmt, ...);
+void Recode_e_code(ecode_list code, uint16_t para , char *detail);
+Res_def JD_Check_Test_Sta(JD_Test_Type type);
+void Check_TestFree(void);
+char *makeJson_Config_BDH(char *deviceId);
+void Report_Limit_Error(le_def type);
+uint32_t tm_to_timestamp(void);
+
+/********************↑           declaration          ↑***********************/
+/**
+ *
+ *
+ *
+ *
+ * */
+/*********************↓        global variables      ↓************************/
+
+/*********************↑        global variables      ↑************************/
+/**
+ *
+ *
+ *
+ *
+ * */
+
+
+
+
+
+
+
+
+/*********************                  250313 BSP_RTC                     ********************/
+#define Reg_Read_Fail 0x7FFF
+typedef enum        //取被写入的RTC寄存器位置
+{
+
+    RayTigCnt_DR2  = 2,       // RTC_BKP_DR2
+    PhotoBase_DR8  = 8,       // RTC_BKP_DR8 拍照基点低16位(F1备份寄存器为16位)
+    PhotoBase_DR9  = 9,       // RTC_BKP_DR9 拍照基点高16位
+    PhotoBase_DR10 = 10,      // RTC_BKP_DR10 拍照基点有效性魔数(最后写, 作提交标记)
+//    RTC_Reg_4_5 ,       // RTC_BKP_DR3
+//    RTC_Reg_CRC ,       // RTC_BKP_DR4
+
+} BKP_Reg_Num;
+
+
+
+typedef enum        //用于定位读写RTC备份寄存器时指定位置
+{
+    Reg_Low = 0,    //取 低 8  位
+    Reg_Middle ,    //取 8 -16 位
+    Reg_High ,      //取 16-24 位
+    Reg_Very_High , //取 24-32 位
+    Reg_Low_16  ,   //取 低16  位
+    Reg_High_16 ,   //取 高16  位
+    Reg_All ,       //取   32  位
+
+} BKP_Reg_Pos;
+
+
+uint16_t RTC_GET_TigVal(void);
+void RTC_SET_TigVal(uint16_t val);
+uint16_t Get_REMAIN(void); // 剩余量% (由已拍张数换算)
+
+/* RTC备份寄存器读写: F1每寄存器16位; Reg_High_16/Reg_All 未实现, 只用 Reg_Low_16 */
+uint32_t BSP_Read_RTC_Reg(BKP_Reg_Num reg_num, BKP_Reg_Pos type);
+uint8_t BSP_Write_RTC_Reg(BKP_Reg_Num reg_num, BKP_Reg_Pos type, uint32_t w_data);
+
+
+#define TRUE  1U
+#define FALSE 0U
+
+/*********************                  250313 BSP_RTC                     ********************/
+
+
+
+
+
+#endif /* APPLICATIONS_TEST_H_ */

Application_SY2/cconfig.h

@@ -0,0 +1,18 @@
+#ifndef CCONFIG_H__
+#define CCONFIG_H__
+/* Automatically generated file; DO NOT EDIT. */
+/* compiler configure file for RT-Thread in GCC*/
+
+#define HAVE_NEWLIB_H 1
+#define LIBC_VERSION "newlib 2.5.0"
+
+#define HAVE_SYS_SIGNAL_H 1
+#define HAVE_SYS_SELECT_H 1
+#define HAVE_PTHREAD_H 1
+
+#define HAVE_FDSET 1
+#define HAVE_SIGACTION 1
+#define GCC_VERSION "6.3.1 20170620 (release) [ARM/embedded-6-branch revision 249437]"
+#define STDC "2011"
+
+#endif

Application_SY2/drivers/board.c

@@ -0,0 +1,379 @@
+/*
+ * Copyright (c) 2006-2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-10-26     ChenYong     first version
+ * 2020-01-08     xiangxistu   add HSI configuration
+ */
+
+#include <board.h>
+#include <rtthread.h>
+
+#define DBG_TAG "board"
+#define DBG_LVL DBG_INFO
+#include <rtdbg.h>
+TIM_HandleTypeDef htim3;
+TIM_HandleTypeDef htim8;
+ADC_HandleTypeDef hadc1;
+SPI_HandleTypeDef hspi1;
+void SystemClock_Config(void)
+{
+
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+    //Initializes the CPU, AHB and APB busses clocks
+
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+    //Initializes the CPU, AHB and APB busses clocks
+
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                                |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+    {
+      Error_Handler();
+    }
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC;
+    PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+    PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+    //Enables the Clock Security System
+
+    HAL_RCC_EnableCSS();
+///////////////////////////////////////////////////////////////////////////////////
+    /*
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+      RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+      RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+      //Initializes the CPU, AHB and APB busses clocks
+
+      RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
+      RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+      RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+      RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+      RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+      RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+      RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+      RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
+      if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+      {
+        Error_Handler();
+      }
+      //Initializes the CPU, AHB and APB busses clocks
+
+      RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                                  |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+      RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+      RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+      RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+      RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+      if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+      {
+        Error_Handler();
+      }
+      PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_ADC;
+      PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+      PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+      if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+      {
+        Error_Handler();
+      }
+      //Enables the Clock Security System
+
+      HAL_RCC_EnableCSS();
+      */
+}
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+
+  if(htim_base->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspInit 0 */
+
+  /* USER CODE END TIM3_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM3_CLK_ENABLE();
+  /* USER CODE BEGIN TIM3_MspInit 1 */
+
+  /* USER CODE END TIM3_MspInit 1 */
+  }
+
+}
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(htim->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspPostInit 0 */
+
+  /* USER CODE END TIM3_MspPostInit 0 */
+   __HAL_RCC_GPIOB_CLK_ENABLE();
+   __HAL_RCC_GPIOC_CLK_ENABLE();
+   /**TIM3 GPIO Configuration
+   PC6     ------> TIM3_CH1
+   PC7     ------> TIM3_CH2
+   PC8     ------> TIM3_CH3
+   */
+  /**TIM3 GPIO Configuration
+    PB0     ------> TIM3_CH3
+    PB1     ------> TIM3_CH4
+    PB4/PC6     ------> TIM3_CH1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+    //吸虫塔屏蔽下面这行，孢子仪打开
+    __HAL_AFIO_REMAP_TIM3_ENABLE();
+
+  /* USER CODE BEGIN TIM3_MspPostInit 1 */
+
+  /* USER CODE END TIM3_MspPostInit 1 */
+  }
+
+
+}
+/**
+  * @brief TIM3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM3_Init(void)
+{
+
+  /* USER CODE BEGIN TIM3_Init 0 */
+  HAL_TIM_Base_MspInit(&htim3);
+  /* USER CODE END TIM3_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+  TIM_OC_InitTypeDef sConfigOC = {0};
+
+  /* USER CODE BEGIN TIM3_Init 1 */
+
+  /* USER CODE END TIM3_Init 1 */
+  htim3.Instance = TIM3;
+  htim3.Init.Prescaler = 72;
+  htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim3.Init.Period = 1000;
+  htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
+  if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+  sConfigOC.Pulse = 100;
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM3_Init 2 */
+
+  /* USER CODE END TIM3_Init 2 */
+  HAL_TIM_MspPostInit(&htim3);
+
+}
+/**
+  * @brief TIM8 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM8_Init(void)
+{
+
+
+
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**ADC1 GPIO Configuration
+    PC0     ------> ADC1_IN10
+    PA0-WKUP     ------> ADC1_IN0
+    PA1     ------> ADC1_IN1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN ADC1_MspInit 1 */
+
+  /* USER CODE END ADC1_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief SPI MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hspi: SPI handle pointer
+* @retval None
+*/
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hspi->Instance==SPI1)
+  {
+  /* USER CODE BEGIN SPI1_MspInit 0 */
+
+  /* USER CODE END SPI1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_SPI1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**SPI1 GPIO Configuration
+    PA5     ------> SPI1_SCK
+    PA6     ------> SPI1_MISO
+    PA7     ------> SPI1_MOSI
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN SPI1_MspInit 1 */
+
+  /* USER CODE END SPI1_MspInit 1 */
+  }
+
+}
+
+/*禁用JTAG*/
+static int REMAP_SWJ_NOJTAG(void)
+{
+
+  __HAL_RCC_AFIO_CLK_ENABLE();
+
+  /**NOJTAG: JTAG-DP Disabled and SW-DP Enabled
+      */
+  __HAL_AFIO_REMAP_SWJ_NOJTAG();
+
+  return RT_EOK;
+}
+/*初始化ADC*/
+static int ADC1_INIT(void)
+{
+    HAL_ADC_MspInit(&hadc1);
+    return RT_EOK;
+}
+/*初始化SPI*/
+static int SPI1_INIT(void)
+{
+    HAL_SPI_MspInit(&hspi1);
+    return RT_EOK;
+}
+/*初始化定时器*/
+static int PWM3_INIT(void)
+{
+    MX_TIM3_Init();
+    MX_TIM8_Init();
+    return RT_EOK;
+}
+/**
+ * Function    ota_app_vtor_reconfig
+ * Description Set Vector Table base location to the start addr of app(RT_APP_PART_ADDR).
+*/
+static int ota_app_vtor_reconfig(void)
+{
+    #define NVIC_VTOR_MASK   0x3FFFFF80
+    /* Set the Vector Table base location by user application firmware definition */
+    SCB->VTOR = RT_APP_PART_ADDR & NVIC_VTOR_MASK;
+    return 0;
+}
+INIT_BOARD_EXPORT(ota_app_vtor_reconfig);
+INIT_BOARD_EXPORT(REMAP_SWJ_NOJTAG);
+INIT_BOARD_EXPORT(ADC1_INIT);
+INIT_BOARD_EXPORT(SPI1_INIT);
+INIT_BOARD_EXPORT(PWM3_INIT);

Application_SY2/drivers/board.h

@@ -0,0 +1,481 @@
+/*
+ * Copyright (c) 2006-2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-10-26     ChenYong     first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <rtthread.h>
+#include <stm32f1xx.h>
+#include "drv_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define RT_APP_PART_ADDR  0x8032000
+
+#define CHIP_FAMILY_STM32
+#define CHIP_SERIES_STM32F1
+#define CHIP_NAME_STM32F103RE
+/*-------------------------- UART CONFIG BEGIN --------------------------*/
+
+/** After configuring corresponding UART or UART DMA, you can use it.
+  *
+  * STEP 1, define macro define related to the serial port opening based on the serial port number
+  *                 such as     #define BSP_USING_UATR1
+  *
+  * STEP 2, according to the corresponding pin of serial port, modify the related serial port information
+  *                 such as     #define UART1_TX_PORT            GPIOX   ->   GPIOA
+  *                             #define UART1_RX_PORT            GPIOX   ->   GPIOA
+  *                             #define UART1_TX_PIN        GPIO_PIN_X   ->   GPIO_PIN_9
+  *                             #define UART1_RX_PIN        GPIO_PIN_X   ->   GPIO_PIN_10
+  *
+  * STEP 3, if you want using SERIAL DMA, you must open it in the RT-Thread Settings.
+  *                 RT-Thread Setting -> Components -> Device Drivers -> Serial Device Drivers -> Enable Serial DMA Mode
+  *
+  * STEP 4, according to serial port number to define serial port tx/rx DMA function in the board.h file
+  *                 such as     #define BSP_UART1_RX_USING_DMA
+  *
+  */
+#define BSP_UART3_RX_USING_DMA  //喇叭
+#define BSP_UART2_RX_USING_DMA  //DTU
+#define BSP_UART4_RX_USING_DMA  //屏幕
+#define BSP_USING_UART1
+#define BSP_USING_UART2
+#define BSP_USING_UART3
+#define BSP_USING_I2C1
+#define BSP_USING_UART4
+#define BSP_USING_UART5
+#if defined(BSP_USING_UART1)
+#define UART1_TX_PORT       GPIOA
+#define UART1_RX_PORT       GPIOA
+#define UART1_TX_PIN        GPIO_PIN_9
+#define UART1_RX_PIN        GPIO_PIN_10
+#endif
+#if defined(BSP_USING_UART2)
+#define UART2_TX_PORT       GPIOA
+#define UART2_RX_PORT       GPIOA
+#define UART2_TX_PIN        GPIO_PIN_2
+#define UART2_RX_PIN        GPIO_PIN_3
+#endif
+#if defined(BSP_USING_UART3)
+#define UART3_TX_PORT       GPIOB
+#define UART3_RX_PORT       GPIOB
+#define UART3_TX_PIN        GPIO_PIN_10
+#define UART3_RX_PIN        GPIO_PIN_11
+#endif
+#if defined(BSP_USING_UART4)
+#define UART4_TX_PORT       GPIOC
+#define UART4_RX_PORT       GPIOC
+#define UART4_TX_PIN        GPIO_PIN_10
+#define UART4_RX_PIN        GPIO_PIN_11
+#endif
+#if defined(BSP_USING_UART5)
+#define UART5_TX_PORT       GPIOC
+#define UART5_RX_PORT       GPIOD
+#define UART5_TX_PIN        GPIO_PIN_12
+#define UART5_RX_PIN        GPIO_PIN_2
+#endif
+#if defined(BSP_USING_UART6)
+#define UART6_TX_PORT       GPIOX
+#define UART6_RX_PORT       GPIOX
+#define UART6_TX_PIN        GPIO_PIN_X
+#define UART6_RX_PIN        GPIO_PIN_X
+#endif
+#if defined(BSP_USING_UART7)
+#define UART7_TX_PORT       GPIOX
+#define UART7_RX_PORT       GPIOX
+#define UART7_TX_PIN        GPIO_PIN_X
+#define UART7_RX_PIN        GPIO_PIN_X
+#endif
+#if defined(BSP_USING_UART8)
+#define UART8_TX_PORT       GPIOX
+#define UART8_RX_PORT       GPIOX
+#define UART8_TX_PIN        GPIO_PIN_X
+#define UART8_RX_PIN        GPIO_PIN_X
+#endif
+#if defined(BSP_USING_LPUART1)
+#define LPUART1_TX_PORT     GPIOX
+#define LPUART1_RX_PORT     GPIOX
+#define LPUART1_TX_PIN      GPIO_PIN_X
+#define LPUART1_RX_PIN      GPIO_PIN_X
+#endif
+/*-------------------------- UART CONFIG END --------------------------*/
+
+
+/*-------------------------- I2C CONFIG BEGIN --------------------------*/
+
+/** if you want to use i2c bus(soft simulate) you can use the following instructions.
+  *
+  * STEP 1, open i2c driver framework(soft simulate) support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the i2c bus
+  *                 such as     #define BSP_USING_I2C1
+  *
+  * STEP 3, according to the corresponding pin of i2c port, modify the related i2c port and pin information
+  *                 such as     #define BSP_I2C1_SCL_PIN    GET_PIN(port, pin)   ->   GET_PIN(C, 11)
+  *                             #define BSP_I2C1_SDA_PIN    GET_PIN(port, pin)   ->   GET_PIN(C, 12)
+  */
+
+/*#define BSP_USING_I2C1*/
+#ifdef BSP_USING_I2C1
+#define BSP_I2C1_SCL_PIN    GET_PIN(B, 6)
+#define BSP_I2C1_SDA_PIN    GET_PIN(B, 7)
+#endif
+
+/*#define BSP_USING_I2C2*/
+#ifdef BSP_USING_I2C2
+#define BSP_I2C2_SCL_PIN    GET_PIN(port, pin)
+#define BSP_I2C2_SDA_PIN    GET_PIN(port, pin)
+#endif
+
+/*-------------------------- I2C CONFIG END --------------------------*/
+
+
+/*-------------------------- SPI CONFIG BEGIN --------------------------*/
+
+/** if you want to use spi bus you can use the following instructions.
+  *
+  * STEP 1, open spi driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the spi bus
+  *                 such as     #define BSP_USING_SPI1
+  *
+  * STEP 3, copy your spi init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end of board.c file
+  *                 such as     void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+  * 
+  * STEP 4, modify your stm32xxxx_hal_config.h file to support spi peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_SPI_MODULE_ENABLED
+  */
+
+#define BSP_USING_SPI1
+/*#define BSP_USING_SPI2*/
+/*#define BSP_USING_SPI3*/
+
+/*-------------------------- SPI CONFIG END --------------------------*/
+
+
+/*-------------------------- QSPI CONFIG BEGIN --------------------------*/
+
+/** if you want to use qspi you can use the following instructions.
+  *
+  * STEP 1, open qspi driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the qspi
+  *                 such as     #define BSP_USING_QSPI
+  *
+  * STEP 3, copy your qspi init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end of board.c file
+  *                 such as     void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
+  * 
+  * STEP 4, modify your stm32xxxx_hal_config.h file to support qspi peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_QSPI_MODULE_ENABLED
+  * 
+  */
+ 
+/*#define BSP_USING_QSPI*/
+
+/*-------------------------- QSPI CONFIG END --------------------------*/
+
+/*-------------------------- PWM CONFIG BEGIN --------------------------*/
+
+/** if you want to use pwm you can use the following instructions.
+  *
+  * STEP 1, open pwm driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the pwm
+  *                 such as     #define BSP_USING_PWM1
+  *
+  * STEP 3, copy your pwm timer init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end if board.c file
+  *                 such as     void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)  and 
+  *                             void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+  * 
+  * STEP 4, modify your stm32xxxx_hal_config.h file to support pwm peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_TIM_MODULE_ENABLED
+  * 
+  */
+
+/*#define BSP_USING_PWM1*/
+/*#define BSP_USING_PWM2*/
+#define BSP_USING_PWM3
+#define BSP_USING_PWM3_CH1
+#define BSP_USING_PWM3_CH3
+#define BSP_USING_PWM3_CH4
+
+
+/*-------------------------- PWM CONFIG END --------------------------*/
+
+
+/*-------------------------- ADC CONFIG BEGIN --------------------------*/
+
+/** if you want to use adc you can use the following instructions.
+  *
+  * STEP 1, open adc driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the adc
+  *                 such as     #define BSP_USING_ADC1
+  *
+  * STEP 3, copy your adc init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end of board.c file
+  *                 such as     void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+  * 
+  * STEP 4, modify your stm32xxxx_hal_config.h file to support adc peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_ADC_MODULE_ENABLED
+  * 
+  */
+
+#define BSP_USING_ADC1
+/*#define BSP_USING_ADC2*/
+/*#define BSP_USING_ADC3*/
+
+/*-------------------------- ADC CONFIG END --------------------------*/
+
+
+/*-------------------------- WDT CONFIG BEGIN --------------------------*/
+
+/** if you want to use wdt you can use the following instructions.
+  *
+  * STEP 1, open wdt driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, modify your stm32xxxx_hal_config.h file to support wdt peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_IWDG_MODULE_ENABLED
+  * 
+  */
+
+/*-------------------------- WDT CONFIG END --------------------------*/
+
+
+/*-------------------------- HARDWARE TIMER CONFIG BEGIN --------------------------*/
+
+/** if you want to use hardware timer you can use the following instructions.
+  *
+  * STEP 1, open hwtimer driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the hwtimer
+  *                 such as     #define BSP_USING_TIM  and
+  *                             #define BSP_USING_TIM1
+  *
+  * STEP 3, copy your hardwire timer init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end of board.c file
+  *                 such as     void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+  * 
+  * STEP 4, modify your stm32xxxx_hal_config.h file to support hardwere timer peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_TIM_MODULE_ENABLED
+  * 
+  */
+
+/*#define BSP_USING_TIM*/
+#ifdef BSP_USING_TIM
+#define BSP_USING_TIM3
+/*#define BSP_USING_TIM15*/
+/*#define BSP_USING_TIM16*/
+/*#define BSP_USING_TIM17*/
+#endif
+
+/*-------------------------- HAREWARE TIMER CONFIG END --------------------------*/
+
+
+/*-------------------------- RTC CONFIG BEGIN --------------------------*/
+
+/** if you want to use rtc(hardware) you can use the following instructions.
+  *
+  * STEP 1, open rtc driver framework(hardware) support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the rtc
+  *                 such as    BSP_USING_ONCHIP_RTC
+  * 
+  * STEP 3, modify your stm32xxxx_hal_config.h file to support rtc peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_RTC_MODULE_ENABLED
+  * 
+  */
+#define BSP_USING_ONCHIP_RTC
+
+/*-------------------------- RTC CONFIG END --------------------------*/
+
+
+/*-------------------------- SDIO CONFIG BEGIN --------------------------*/
+
+/** if you want to use sdio you can use the following instructions.
+  *
+  * STEP 1, open sdio driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the sdio
+  *                 such as    BSP_USING_SDIO
+  * 
+  * STEP 3, copy your sdio init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end of board.c file
+  *                 such as     void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
+  * 
+  * STEP 4, modify your stm32xxxx_hal_config.h file to support sdio peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_SD_MODULE_ENABLED
+  * 
+  * STEP 5, config your device file system or another applications
+  * 
+  */
+
+/*#define BSP_USING_SDIO*/
+
+/*-------------------------- SDIO CONFIG END --------------------------*/
+
+
+/*-------------------------- ETH CONFIG BEGIN --------------------------*/
+
+/** if you want to use eth you can use the following instructions.
+  *
+  * STEP 1, define macro related to the eth
+  *                 such as    BSP_USING_ETH
+  * 
+  * STEP 2, copy your eth init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end if board.c file
+  *                 such as     void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
+  * 
+  * STEP 3, modify your stm32xxxx_hal_config.h file to support eth peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_ETH_MODULE_ENABLED
+  * 
+  * STEP 4, config your phy type
+  *                 such as     #define PHY_USING_LAN8720A
+  *                             #define PHY_USING_DM9161CEP
+  *                             #define PHY_USING_DP83848C
+  * STEP 5, implement your phy reset function in the end of board.c file
+  *                 void phy_reset(void)
+  * 
+  * STEP 6, config your lwip or other network stack
+  * 
+  */
+
+/*#define BSP_USING_ETH*/
+#ifdef BSP_USING_ETH
+/*#define PHY_USING_LAN8720A*/
+/*#define PHY_USING_DM9161CEP*/
+/*#define PHY_USING_DP83848C*/
+#endif
+/*-------------------------- ETH CONFIG END --------------------------*/
+
+
+/*-------------------------- USB HOST CONFIG BEGIN --------------------------*/
+
+/** if you want to use usb host you can use the following instructions.
+  *
+  * STEP 1, open usb host driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2, define macro related to the usb host
+  *                 such as    BSP_USING_USBHOST
+  * 
+  * STEP 3, copy your usb host init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end of board.c file
+  *                 such as     void HAL_HCD_MspInit(HCD_HandleTypeDef* hhcd)
+  * 
+  * STEP 4, config your usb peripheral clock in SystemClock_Config() generated by STM32CubeMX and replace this function in board.c
+  * 
+  * STEP 5, modify your stm32xxxx_hal_config.h file to support usb host peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_HCD_MODULE_ENABLED
+  * 
+  */
+
+/*#define BSP_USING_USBHOST*/
+
+/*-------------------------- USB HOST CONFIG END --------------------------*/
+
+
+/*-------------------------- USB DEVICE CONFIG BEGIN --------------------------*/
+
+/** if you want to use usb device you can use the following instructions.
+  *
+  * STEP 1, open usb device driver framework support in the RT-Thread Settings file
+  * 
+  * STEP 2 define macro related to the usb device
+  *                 such as    BSP_USING_USBDEVICE
+  * 
+  * STEP 3, copy your usb device init function from stm32xxxx_hal_msp.c generated by stm32cubemx to the end of board.c file
+  *                 such as     void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd)
+  * 
+  * STEP 4, config your usb peripheral clock in SystemClock_Config() generated by STM32CubeMX and replace this function in board.c
+  * 
+  * STEP 5, modify your stm32xxxx_hal_config.h file to support usb device peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_PCD_MODULE_ENABLED
+  * 
+  */
+
+/*#define BSP_USING_USBDEVICE*/
+
+/*-------------------------- USB DEVICE CONFIG END --------------------------*/
+
+
+/*-------------------------- ON_CHIP_FLASH CONFIG BEGIN --------------------------*/
+
+/** if you want to use on chip flash you can use the following instructions.
+  *
+  * STEP 1 define macro related to the on chip flash
+  *                 such as    BSP_USING_ON_CHIP_FLASH
+  * 
+  * STEP 2, modify your stm32xxxx_hal_config.h file to support on chip flash peripherals. define macro related to the peripherals
+  *                 such as     #define HAL_FLASH_MODULE_ENABLED
+  * 
+  */
+
+#define BSP_USING_ON_CHIP_FLASH
+
+/*-------------------------- ON_CHIP_FLASH CONFIG END --------------------------*/
+
+
+/*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/
+
+//#define STM32_FLASH_START_ADRESS       ((uint32_t)0x8020000)
+//#define STM32_FLASH_SIZE               (512)
+//#define STM32_FLASH_END_ADDRESS        ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE * 1024))
+//
+//#define STM32_SRAM1_SIZE               (128)
+//#define STM32_SRAM1_START              (0x20000000)
+//#define STM32_SRAM1_END                (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
+//
+//#if defined(__CC_ARM) || defined(__CLANG_ARM)
+//extern int Image$RW_IRAM1$ZI$Limit;
+//#define HEAP_BEGIN      ((void *)&Image$RW_IRAM1$ZI$Limit)
+//#elif __ICCARM__
+//#pragma section="CSTACK"
+//#define HEAP_BEGIN      (__segment_end("CSTACK"))
+//#else
+//extern int __bss_end;
+//#define HEAP_BEGIN      ((void *)&__bss_end)
+//#endif
+//
+//#define HEAP_END                       STM32_SRAM1_END
+
+/*-------------------------- ROM/RAM CONFIG END --------------------------*/
+
+//250322 适配为stm32适用的RAM SIZE
+/*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/
+
+#define STM32_FLASH_START_ADRESS       ((uint32_t)0x08032000)  // 确认与链接脚本一致
+#define STM32_FLASH_SIZE               (312)                   // 312 KB
+#define STM32_FLASH_END_ADDRESS        ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE * 1024))
+
+#define STM32_SRAM1_SIZE               (64)  // STM32F103RET6 实际 RAM 为 64 KB
+#define STM32_SRAM1_START              (0x20000000)
+#define STM32_SRAM1_END                (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)  // 0x20010000
+
+// HEAP_BEGIN 定义无误，保持原样
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$RW_IRAM1$ZI$Limit;
+#define HEAP_BEGIN      ((void *)&Image$RW_IRAM1$ZI$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      ((void *)&__bss_end)
+#endif
+
+#define HEAP_END                       STM32_SRAM1_END  // 修正为 0x20010000
+
+/*-------------------------- ROM/RAM CONFIG END --------------------------*/
+
+
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BOARD_H__ */
+

Application_SY2/drivers/drv_adc.c

@@ -0,0 +1,286 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-05     zylx         first version
+ * 2018-12-12     greedyhao    Porting for stm32f7xx
+ * 2019-02-01     yuneizhilin   fix the stm32_adc_init function initialization issue
+ */
+
+#include <board.h>
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3)
+#include "drv_config.h"
+
+//#define DRV_DEBUG
+#define LOG_TAG             "drv.adc"
+#include <drv_log.h>
+
+static ADC_HandleTypeDef adc_config[] =
+{
+#ifdef BSP_USING_ADC1
+    ADC1_CONFIG,
+#endif
+
+#ifdef BSP_USING_ADC2
+    ADC2_CONFIG,
+#endif
+
+#ifdef BSP_USING_ADC3
+    ADC3_CONFIG,
+#endif
+};
+
+struct stm32_adc
+{
+    ADC_HandleTypeDef ADC_Handler;
+    struct rt_adc_device stm32_adc_device;
+};
+
+static struct stm32_adc stm32_adc_obj[sizeof(adc_config) / sizeof(adc_config[0])];
+
+static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
+{
+    ADC_HandleTypeDef *stm32_adc_handler;
+    RT_ASSERT(device != RT_NULL);
+    stm32_adc_handler = device->parent.user_data;
+
+    if (enabled)
+    {
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
+        ADC_Enable(stm32_adc_handler);
+#else
+        __HAL_ADC_ENABLE(stm32_adc_handler);
+#endif
+    }
+    else
+    {
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
+        ADC_Disable(stm32_adc_handler);
+#else
+        __HAL_ADC_DISABLE(stm32_adc_handler);
+#endif
+    }
+
+    return RT_EOK;
+}
+
+static rt_uint32_t stm32_adc_get_channel(rt_uint32_t channel)
+{
+    rt_uint32_t stm32_channel = 0;
+
+    switch (channel)
+    {
+    case  0:
+        stm32_channel = ADC_CHANNEL_0;
+        break;
+    case  1:
+        stm32_channel = ADC_CHANNEL_1;
+        break;
+    case  2:
+        stm32_channel = ADC_CHANNEL_2;
+        break;
+    case  3:
+        stm32_channel = ADC_CHANNEL_3;
+        break;
+    case  4:
+        stm32_channel = ADC_CHANNEL_4;
+        break;
+    case  5:
+        stm32_channel = ADC_CHANNEL_5;
+        break;
+    case  6:
+        stm32_channel = ADC_CHANNEL_6;
+        break;
+    case  7:
+        stm32_channel = ADC_CHANNEL_7;
+        break;
+    case  8:
+        stm32_channel = ADC_CHANNEL_8;
+        break;
+    case  9:
+        stm32_channel = ADC_CHANNEL_9;
+        break;
+    case 10:
+        stm32_channel = ADC_CHANNEL_10;
+        break;
+    case 11:
+        stm32_channel = ADC_CHANNEL_11;
+        break;
+    case 12:
+        stm32_channel = ADC_CHANNEL_12;
+        break;
+    case 13:
+        stm32_channel = ADC_CHANNEL_13;
+        break;
+    case 14:
+        stm32_channel = ADC_CHANNEL_14;
+        break;
+    case 15:
+        stm32_channel = ADC_CHANNEL_15;
+        break;
+#ifdef ADC_CHANNEL_16
+    case 16:
+        stm32_channel = ADC_CHANNEL_16;
+        break;
+#endif
+    case 17:
+        stm32_channel = ADC_CHANNEL_17;
+        break;
+#ifdef ADC_CHANNEL_18
+    case 18:
+        stm32_channel = ADC_CHANNEL_18;
+        break;
+#endif
+#ifdef ADC_CHANNEL_19
+    case 19:
+        stm32_channel = ADC_CHANNEL_19;
+        break;
+#endif
+    }
+
+    return stm32_channel;
+}
+
+static rt_err_t stm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
+{
+    ADC_ChannelConfTypeDef ADC_ChanConf;
+    ADC_HandleTypeDef *stm32_adc_handler;
+
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(value != RT_NULL);
+
+    stm32_adc_handler = device->parent.user_data;
+
+    rt_memset(&ADC_ChanConf, 0, sizeof(ADC_ChanConf));
+
+#ifndef ADC_CHANNEL_16
+    if (channel == 16)
+    {
+        LOG_E("ADC channel must not be 16.");
+        return -RT_ERROR;
+    }
+#endif
+
+/* ADC channel number is up to 17 */
+#if !defined(ADC_CHANNEL_18)
+    if (channel <= 17)
+/* ADC channel number is up to 19 */
+#elif defined(ADC_CHANNEL_19)
+    if (channel <= 19)
+/* ADC channel number is up to 18 */
+#else
+    if (channel <= 18)
+#endif
+    {
+        /* set stm32 ADC channel */
+        ADC_ChanConf.Channel =  stm32_adc_get_channel(channel);
+    }
+    else
+    {
+#if !defined(ADC_CHANNEL_18)
+        LOG_E("ADC channel must be between 0 and 17.");
+#elif defined(ADC_CHANNEL_19)
+        LOG_E("ADC channel must be between 0 and 19.");
+#else
+        LOG_E("ADC channel must be between 0 and 18.");
+#endif
+        return -RT_ERROR;
+    }
+    ADC_ChanConf.Rank = 1;
+#if defined(SOC_SERIES_STM32F0)
+    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_71CYCLES_5;
+#elif defined(SOC_SERIES_STM32F1)
+    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
+#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_112CYCLES;
+#elif defined(SOC_SERIES_STM32L4)
+    ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
+#endif
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
+    ADC_ChanConf.Offset = 0;
+#endif
+#ifdef SOC_SERIES_STM32L4
+    ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;
+    ADC_ChanConf.SingleDiff = LL_ADC_SINGLE_ENDED;
+#endif
+    HAL_ADC_ConfigChannel(stm32_adc_handler, &ADC_ChanConf);
+
+    /* start ADC */
+    HAL_ADC_Start(stm32_adc_handler);
+
+    /* Wait for the ADC to convert */
+    HAL_ADC_PollForConversion(stm32_adc_handler, 100);
+
+    /* get ADC value */
+    *value = (rt_uint32_t)HAL_ADC_GetValue(stm32_adc_handler);
+
+    return RT_EOK;
+}
+
+static const struct rt_adc_ops stm_adc_ops =
+{
+    .enabled = stm32_adc_enabled,
+    .convert = stm32_get_adc_value,
+};
+
+static int stm32_adc_init(void)
+{
+    int result = RT_EOK;
+    /* save adc name */
+    char name_buf[5] = {'a', 'd', 'c', '0', 0};
+    int i = 0;
+
+    for (i = 0; i < sizeof(adc_config) / sizeof(adc_config[0]); i++)
+    {
+        /* ADC init */
+        name_buf[3] = '0';
+        stm32_adc_obj[i].ADC_Handler = adc_config[i];
+#if defined(ADC1)
+        if (stm32_adc_obj[i].ADC_Handler.Instance == ADC1)
+        {
+            name_buf[3] = '1';
+        }
+#endif
+#if defined(ADC2)
+        if (stm32_adc_obj[i].ADC_Handler.Instance == ADC2)
+        {
+            name_buf[3] = '2';
+        }
+#endif
+#if defined(ADC3)
+        if (stm32_adc_obj[i].ADC_Handler.Instance == ADC3)
+        {
+            name_buf[3] = '3';
+        }
+#endif
+        if (HAL_ADC_Init(&stm32_adc_obj[i].ADC_Handler) != HAL_OK)
+        {
+            LOG_E("%s init failed", name_buf);
+            result = -RT_ERROR;
+        }
+        else
+        {
+            /* register ADC device */
+            if (rt_hw_adc_register(&stm32_adc_obj[i].stm32_adc_device, name_buf, &stm_adc_ops, &stm32_adc_obj[i].ADC_Handler) == RT_EOK)
+            {
+                LOG_D("%s init success", name_buf);
+            }
+            else
+            {
+                LOG_E("%s register failed", name_buf);
+                result = -RT_ERROR;
+            }
+        }
+    }
+
+    return result;
+}
+INIT_BOARD_EXPORT(stm32_adc_init);
+
+#endif /* BSP_USING_ADC */

Application_SY2/drivers/drv_common.c

@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-7      SummerGift   first version
+ */
+
+#include "drv_common.h"
+#include "board.h"
+
+#ifdef RT_USING_FINSH
+#include <finsh.h>
+static void reboot(uint8_t argc, char **argv)
+{
+    rt_hw_cpu_reset();
+}
+FINSH_FUNCTION_EXPORT_ALIAS(reboot, __cmd_reboot, Reboot System);
+#endif /* RT_USING_FINSH */
+
+/* SysTick configuration */
+void rt_hw_systick_init(void)
+{
+#if defined (SOC_SERIES_STM32H7)
+    HAL_SYSTICK_Config((HAL_RCCEx_GetD1SysClockFreq()) / RT_TICK_PER_SECOND);
+#else
+    HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND);
+#endif
+    HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+    HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_IncTick();
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+uint32_t HAL_GetTick(void)
+{
+    return rt_tick_get() * 1000 / RT_TICK_PER_SECOND;
+}
+
+void HAL_SuspendTick(void)
+{
+}
+
+void HAL_ResumeTick(void)
+{
+}
+
+void HAL_Delay(__IO uint32_t Delay)
+{
+}
+
+/* re-implement tick interface for STM32 HAL */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+    /* Return function status */
+    return HAL_OK;
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @param  None
+  * @retval None
+  */
+void _Error_Handler(char *s, int num)
+{
+    /* USER CODE BEGIN Error_Handler */
+    /* User can add his own implementation to report the HAL error return state */
+    while(1)
+    {
+    }
+    /* USER CODE END Error_Handler */
+}
+
+/**
+ * This function will delay for some us.
+ *
+ * @param us the delay time of us
+ */
+void rt_hw_us_delay(rt_uint32_t us)
+{
+    rt_uint32_t start, now, delta, reload, us_tick;
+    start = SysTick->VAL;
+    reload = SysTick->LOAD;
+    us_tick = SystemCoreClock / 1000000UL;
+    do {
+        now = SysTick->VAL;
+        delta = start > now ? start - now : reload + start - now;
+    } while(delta < us_tick * us);
+}
+
+/**
+ * This function will initial STM32 board.
+ */
+RT_WEAK void rt_hw_board_init()
+{
+#ifdef SCB_EnableICache
+    /* Enable I-Cache---------------------------------------------------------*/
+    SCB_EnableICache();
+#endif
+
+#ifdef SCB_EnableDCache
+    /* Enable D-Cache---------------------------------------------------------*/
+    SCB_EnableDCache();
+#endif
+
+    /* HAL_Init() function is called at the beginning of the program */
+    HAL_Init();
+
+    /* enable interrupt */
+    __set_PRIMASK(0);
+    /* System clock initialization */
+    SystemClock_Config();
+    /* disbale interrupt */
+    __set_PRIMASK(1);
+
+    rt_hw_systick_init();
+
+    /* Heap initialization */
+#if defined(RT_USING_HEAP)
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+
+    /* Pin driver initialization is open by default */
+#ifdef RT_USING_PIN
+    extern int rt_hw_pin_init(void);
+    rt_hw_pin_init();
+#endif
+
+    /* USART driver initialization is open by default */
+#ifdef RT_USING_SERIAL
+    extern int rt_hw_usart_init(void);
+    rt_hw_usart_init();
+#endif
+
+    /* Set the shell console output device */
+#if defined(RT_USING_DEVICE) && defined(RT_USING_CONSOLE)
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+    /* Board underlying hardware initialization */
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+}

Application_SY2/drivers/drv_eth.c

@@ -0,0 +1,667 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-19     SummerGift   first version
+ * 2018-12-25     zylx         fix some bugs
+ * 2019-06-10     SummerGift   optimize PHY state detection process
+ * 2019-09-03     xiaofan      optimize link change detection process
+ */
+
+#include<rtthread.h>
+#include<rtdevice.h>
+#include "board.h"
+#include "drv_config.h"
+
+#ifdef BSP_USING_ETH
+
+#include <netif/ethernetif.h>
+#include "lwipopts.h"
+#include "drv_eth.h"
+
+/*
+* Emac driver uses CubeMX tool to generate emac and phy's configuration,
+* the configuration files can be found in CubeMX_Config folder.
+*/
+
+/* debug option */
+//#define ETH_RX_DUMP
+//#define ETH_TX_DUMP
+//#define DRV_DEBUG
+#define LOG_TAG             "drv.emac"
+#include <drv_log.h>
+
+#define MAX_ADDR_LEN 6
+
+struct rt_stm32_eth
+{
+    /* inherit from ethernet device */
+    struct eth_device parent;
+#ifndef PHY_USING_INTERRUPT_MODE
+    rt_timer_t poll_link_timer;
+#endif
+
+    /* interface address info, hw address */
+    rt_uint8_t  dev_addr[MAX_ADDR_LEN];
+    /* ETH_Speed */
+    uint32_t    ETH_Speed;
+    /* ETH_Duplex_Mode */
+    uint32_t    ETH_Mode;
+};
+
+static ETH_DMADescTypeDef *DMARxDscrTab, *DMATxDscrTab;
+static rt_uint8_t *Rx_Buff, *Tx_Buff;
+static  ETH_HandleTypeDef EthHandle;
+static struct rt_stm32_eth stm32_eth_device;
+
+#if defined(ETH_RX_DUMP) || defined(ETH_TX_DUMP)
+#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
+static void dump_hex(const rt_uint8_t *ptr, rt_size_t buflen)
+{
+    unsigned char *buf = (unsigned char *)ptr;
+    int i, j;
+
+    for (i = 0; i < buflen; i += 16)
+    {
+        rt_kprintf("%08X: ", i);
+
+        for (j = 0; j < 16; j++)
+            if (i + j < buflen)
+                rt_kprintf("%02X ", buf[i + j]);
+            else
+                rt_kprintf("   ");
+        rt_kprintf(" ");
+
+        for (j = 0; j < 16; j++)
+            if (i + j < buflen)
+                rt_kprintf("%c", __is_print(buf[i + j]) ? buf[i + j] : '.');
+        rt_kprintf("\n");
+    }
+}
+#endif
+
+extern void phy_reset(void);
+/* EMAC initialization function */
+static rt_err_t rt_stm32_eth_init(rt_device_t dev)
+{
+    __HAL_RCC_ETH_CLK_ENABLE();
+
+    phy_reset();
+
+    /* ETHERNET Configuration */
+    EthHandle.Instance = ETH;
+    EthHandle.Init.MACAddr = (rt_uint8_t *)&stm32_eth_device.dev_addr[0];
+    EthHandle.Init.AutoNegotiation = ETH_AUTONEGOTIATION_DISABLE;
+    EthHandle.Init.Speed = ETH_SPEED_100M;
+    EthHandle.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
+    EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
+    EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE;
+#ifdef RT_LWIP_USING_HW_CHECKSUM
+    EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
+#else
+    EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_SOFTWARE;
+#endif
+
+    HAL_ETH_DeInit(&EthHandle);
+
+    /* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */
+    if (HAL_ETH_Init(&EthHandle) != HAL_OK)
+    {
+        LOG_E("eth hardware init failed");
+    }
+    else
+    {
+        LOG_D("eth hardware init success");
+    }
+
+    /* Initialize Tx Descriptors list: Chain Mode */
+    HAL_ETH_DMATxDescListInit(&EthHandle, DMATxDscrTab, Tx_Buff, ETH_TXBUFNB);
+
+    /* Initialize Rx Descriptors list: Chain Mode  */
+    HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, Rx_Buff, ETH_RXBUFNB);
+
+    /* ETH interrupt Init */
+    HAL_NVIC_SetPriority(ETH_IRQn, 0x07, 0);
+    HAL_NVIC_EnableIRQ(ETH_IRQn);
+
+    /* Enable MAC and DMA transmission and reception */
+    if (HAL_ETH_Start(&EthHandle) == HAL_OK)
+    {
+        LOG_D("emac hardware start");
+    }
+    else
+    {
+        LOG_E("emac hardware start faild");
+        return -RT_ERROR;
+    }
+
+    return RT_EOK;
+}
+
+static rt_err_t rt_stm32_eth_open(rt_device_t dev, rt_uint16_t oflag)
+{
+    LOG_D("emac open");
+    return RT_EOK;
+}
+
+static rt_err_t rt_stm32_eth_close(rt_device_t dev)
+{
+    LOG_D("emac close");
+    return RT_EOK;
+}
+
+static rt_size_t rt_stm32_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
+{
+    LOG_D("emac read");
+    rt_set_errno(-RT_ENOSYS);
+    return 0;
+}
+
+static rt_size_t rt_stm32_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
+{
+    LOG_D("emac write");
+    rt_set_errno(-RT_ENOSYS);
+    return 0;
+}
+
+static rt_err_t rt_stm32_eth_control(rt_device_t dev, int cmd, void *args)
+{
+    switch (cmd)
+    {
+    case NIOCTL_GADDR:
+        /* get mac address */
+        if (args) rt_memcpy(args, stm32_eth_device.dev_addr, 6);
+        else return -RT_ERROR;
+        break;
+
+    default :
+        break;
+    }
+
+    return RT_EOK;
+}
+
+/* ethernet device interface */
+/* transmit data*/
+rt_err_t rt_stm32_eth_tx(rt_device_t dev, struct pbuf *p)
+{
+    rt_err_t ret = RT_ERROR;
+    HAL_StatusTypeDef state;
+    struct pbuf *q;
+    uint8_t *buffer = (uint8_t *)(EthHandle.TxDesc->Buffer1Addr);
+    __IO ETH_DMADescTypeDef *DmaTxDesc;
+    uint32_t framelength = 0;
+    uint32_t bufferoffset = 0;
+    uint32_t byteslefttocopy = 0;
+    uint32_t payloadoffset = 0;
+
+    DmaTxDesc = EthHandle.TxDesc;
+    bufferoffset = 0;
+
+    /* copy frame from pbufs to driver buffers */
+    for (q = p; q != NULL; q = q->next)
+    {
+        /* Is this buffer available? If not, goto error */
+        if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
+        {
+            LOG_D("buffer not valid");
+            ret = ERR_USE;
+            goto error;
+        }
+
+        /* Get bytes in current lwIP buffer */
+        byteslefttocopy = q->len;
+        payloadoffset = 0;
+
+        /* Check if the length of data to copy is bigger than Tx buffer size*/
+        while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE)
+        {
+            /* Copy data to Tx buffer*/
+            memcpy((uint8_t *)((uint8_t *)buffer + bufferoffset), (uint8_t *)((uint8_t *)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset));
+
+            /* Point to next descriptor */
+            DmaTxDesc = (ETH_DMADescTypeDef *)(DmaTxDesc->Buffer2NextDescAddr);
+
+            /* Check if the buffer is available */
+            if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
+            {
+                LOG_E("dma tx desc buffer is not valid");
+                ret = ERR_USE;
+                goto error;
+            }
+
+            buffer = (uint8_t *)(DmaTxDesc->Buffer1Addr);
+
+            byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
+            payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
+            framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
+            bufferoffset = 0;
+        }
+
+        /* Copy the remaining bytes */
+        memcpy((uint8_t *)((uint8_t *)buffer + bufferoffset), (uint8_t *)((uint8_t *)q->payload + payloadoffset), byteslefttocopy);
+        bufferoffset = bufferoffset + byteslefttocopy;
+        framelength = framelength + byteslefttocopy;
+    }
+
+#ifdef ETH_TX_DUMP
+    dump_hex(buffer, p->tot_len);
+#endif
+
+    /* Prepare transmit descriptors to give to DMA */
+    /* TODO Optimize data send speed*/
+    LOG_D("transmit frame length :%d", framelength);
+
+    /* wait for unlocked */
+    while (EthHandle.Lock == HAL_LOCKED);
+
+    state = HAL_ETH_TransmitFrame(&EthHandle, framelength);
+    if (state != HAL_OK)
+    {
+        LOG_E("eth transmit frame faild: %d", state);
+    }
+
+    ret = ERR_OK;
+
+error:
+
+    /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
+    if ((EthHandle.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET)
+    {
+        /* Clear TUS ETHERNET DMA flag */
+        EthHandle.Instance->DMASR = ETH_DMASR_TUS;
+
+        /* Resume DMA transmission*/
+        EthHandle.Instance->DMATPDR = 0;
+    }
+
+    return ret;
+}
+
+/* receive data*/
+struct pbuf *rt_stm32_eth_rx(rt_device_t dev)
+{
+
+    struct pbuf *p = NULL;
+    struct pbuf *q = NULL;
+    HAL_StatusTypeDef state;
+    uint16_t len = 0;
+    uint8_t *buffer;
+    __IO ETH_DMADescTypeDef *dmarxdesc;
+    uint32_t bufferoffset = 0;
+    uint32_t payloadoffset = 0;
+    uint32_t byteslefttocopy = 0;
+    uint32_t i = 0;
+
+    /* Get received frame */
+    state = HAL_ETH_GetReceivedFrame_IT(&EthHandle);
+    if (state != HAL_OK)
+    {
+        LOG_D("receive frame faild");
+        return NULL;
+    }
+
+    /* Obtain the size of the packet and put it into the "len" variable. */
+    len = EthHandle.RxFrameInfos.length;
+    buffer = (uint8_t *)EthHandle.RxFrameInfos.buffer;
+
+    LOG_D("receive frame len : %d", len);
+
+    if (len > 0)
+    {
+        /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
+        p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+    }
+
+#ifdef ETH_RX_DUMP
+    dump_hex(buffer, p->tot_len);
+#endif
+
+    if (p != NULL)
+    {
+        dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
+        bufferoffset = 0;
+        for (q = p; q != NULL; q = q->next)
+        {
+            byteslefttocopy = q->len;
+            payloadoffset = 0;
+
+            /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
+            while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE)
+            {
+                /* Copy data to pbuf */
+                memcpy((uint8_t *)((uint8_t *)q->payload + payloadoffset), (uint8_t *)((uint8_t *)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
+
+                /* Point to next descriptor */
+                dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
+                buffer = (uint8_t *)(dmarxdesc->Buffer1Addr);
+
+                byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
+                payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
+                bufferoffset = 0;
+            }
+            /* Copy remaining data in pbuf */
+            memcpy((uint8_t *)((uint8_t *)q->payload + payloadoffset), (uint8_t *)((uint8_t *)buffer + bufferoffset), byteslefttocopy);
+            bufferoffset = bufferoffset + byteslefttocopy;
+        }
+    }
+
+    /* Release descriptors to DMA */
+    /* Point to first descriptor */
+    dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
+    /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
+    for (i = 0; i < EthHandle.RxFrameInfos.SegCount; i++)
+    {
+        dmarxdesc->Status |= ETH_DMARXDESC_OWN;
+        dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
+    }
+
+    /* Clear Segment_Count */
+    EthHandle.RxFrameInfos.SegCount = 0;
+
+    /* When Rx Buffer unavailable flag is set: clear it and resume reception */
+    if ((EthHandle.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET)
+    {
+        /* Clear RBUS ETHERNET DMA flag */
+        EthHandle.Instance->DMASR = ETH_DMASR_RBUS;
+        /* Resume DMA reception */
+        EthHandle.Instance->DMARPDR = 0;
+    }
+
+    return p;
+}
+
+/* interrupt service routine */
+void ETH_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_ETH_IRQHandler(&EthHandle);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
+{
+    rt_err_t result;
+    result = eth_device_ready(&(stm32_eth_device.parent));
+    if (result != RT_EOK)
+        LOG_I("RxCpltCallback err = %d", result);
+}
+
+void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
+{
+    LOG_E("eth err");
+}
+
+enum {
+    PHY_LINK        = (1 << 0),
+    PHY_100M        = (1 << 1),
+    PHY_FULL_DUPLEX = (1 << 2),
+};
+
+static void phy_linkchange()
+{
+    static rt_uint8_t phy_speed = 0;
+    rt_uint8_t phy_speed_new = 0;
+    rt_uint32_t status;
+
+    HAL_ETH_ReadPHYRegister(&EthHandle, PHY_BASIC_STATUS_REG, (uint32_t *)&status);
+    LOG_D("phy basic status reg is 0x%X", status);
+
+    if (status & (PHY_AUTONEGO_COMPLETE_MASK | PHY_LINKED_STATUS_MASK))
+    {
+        rt_uint32_t SR = 0;
+
+        phy_speed_new |= PHY_LINK;
+
+        HAL_ETH_ReadPHYRegister(&EthHandle, PHY_Status_REG, (uint32_t *)&SR);
+        LOG_D("phy control status reg is 0x%X", SR);
+
+        if (PHY_Status_SPEED_100M(SR))
+        {
+            phy_speed_new |= PHY_100M;
+        }
+
+        if (PHY_Status_FULL_DUPLEX(SR))
+        {
+            phy_speed_new |= PHY_FULL_DUPLEX;
+        }
+    }
+
+    if (phy_speed != phy_speed_new)
+    {
+        phy_speed = phy_speed_new;
+        if (phy_speed & PHY_LINK)
+        {
+            LOG_D("link up");
+            if (phy_speed & PHY_100M)
+            {
+                LOG_D("100Mbps");
+                stm32_eth_device.ETH_Speed = ETH_SPEED_100M;
+            }
+            else
+            {
+                stm32_eth_device.ETH_Speed = ETH_SPEED_10M;
+                LOG_D("10Mbps");
+            }
+
+            if (phy_speed & PHY_FULL_DUPLEX)
+            {
+                LOG_D("full-duplex");
+                stm32_eth_device.ETH_Mode = ETH_MODE_FULLDUPLEX;
+            }
+            else
+            {
+                LOG_D("half-duplex");
+                stm32_eth_device.ETH_Mode = ETH_MODE_HALFDUPLEX;
+            }
+
+            /* send link up. */
+            eth_device_linkchange(&stm32_eth_device.parent, RT_TRUE);
+        }
+        else
+        {
+            LOG_I("link down");
+            eth_device_linkchange(&stm32_eth_device.parent, RT_FALSE);
+        }
+    }
+}
+
+#ifdef PHY_USING_INTERRUPT_MODE
+static void eth_phy_isr(void *args)
+{
+    rt_uint32_t status = 0;
+
+    HAL_ETH_ReadPHYRegister(&EthHandle, PHY_INTERRUPT_FLAG_REG, (uint32_t *)&status);
+    LOG_D("phy interrupt status reg is 0x%X", status);
+
+    phy_linkchange();
+}
+#endif /* PHY_USING_INTERRUPT_MODE */
+
+static void phy_monitor_thread_entry(void *parameter)
+{
+    uint8_t phy_addr = 0xFF;
+    uint8_t detected_count = 0;
+
+    while(phy_addr == 0xFF)
+    {
+        /* phy search */
+        rt_uint32_t i, temp;
+        for (i = 0; i <= 0x1F; i++)
+        {
+            EthHandle.Init.PhyAddress = i;
+            HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ID1_REG, (uint32_t *)&temp);
+
+            if (temp != 0xFFFF && temp != 0x00)
+            {
+                phy_addr = i;
+                break;
+            }
+        }
+
+        detected_count++;
+        rt_thread_mdelay(1000);
+
+        if (detected_count > 10)
+        {
+            LOG_E("No PHY device was detected, please check hardware!");
+        }
+    }
+
+    LOG_D("Found a phy, address:0x%02X", phy_addr);
+
+    /* RESET PHY */
+    LOG_D("RESET PHY!");
+    HAL_ETH_WritePHYRegister(&EthHandle, PHY_BASIC_CONTROL_REG, PHY_RESET_MASK);
+    rt_thread_mdelay(2000);
+    HAL_ETH_WritePHYRegister(&EthHandle, PHY_BASIC_CONTROL_REG, PHY_AUTO_NEGOTIATION_MASK);
+
+    phy_linkchange();
+#ifdef PHY_USING_INTERRUPT_MODE
+    /* configuration intterrupt pin */
+    rt_pin_mode(PHY_INT_PIN, PIN_MODE_INPUT_PULLUP);
+    rt_pin_attach_irq(PHY_INT_PIN, PIN_IRQ_MODE_FALLING, eth_phy_isr, (void *)"callbackargs");
+    rt_pin_irq_enable(PHY_INT_PIN, PIN_IRQ_ENABLE);
+
+    /* enable phy interrupt */
+    HAL_ETH_WritePHYRegister(&EthHandle, PHY_INTERRUPT_MASK_REG, PHY_INT_MASK);
+#if defined(PHY_INTERRUPT_CTRL_REG)
+    HAL_ETH_WritePHYRegister(&EthHandle, PHY_INTERRUPT_CTRL_REG, PHY_INTERRUPT_EN);
+#endif
+#else /* PHY_USING_INTERRUPT_MODE */
+    stm32_eth_device.poll_link_timer = rt_timer_create("phylnk", (void (*)(void*))phy_linkchange,
+                                        NULL, RT_TICK_PER_SECOND, RT_TIMER_FLAG_PERIODIC);
+    if (!stm32_eth_device.poll_link_timer || rt_timer_start(stm32_eth_device.poll_link_timer) != RT_EOK)
+    {
+        LOG_E("Start link change detection timer failed");
+    }
+#endif /* PHY_USING_INTERRUPT_MODE */
+}
+
+/* Register the EMAC device */
+static int rt_hw_stm32_eth_init(void)
+{
+    rt_err_t state = RT_EOK;
+
+    /* Prepare receive and send buffers */
+    Rx_Buff = (rt_uint8_t *)rt_calloc(ETH_RXBUFNB, ETH_MAX_PACKET_SIZE);
+    if (Rx_Buff == RT_NULL)
+    {
+        LOG_E("No memory");
+        state = -RT_ENOMEM;
+        goto __exit;
+    }
+
+    Tx_Buff = (rt_uint8_t *)rt_calloc(ETH_TXBUFNB, ETH_MAX_PACKET_SIZE);
+    if (Tx_Buff == RT_NULL)
+    {
+        LOG_E("No memory");
+        state = -RT_ENOMEM;
+        goto __exit;
+    }
+
+    DMARxDscrTab = (ETH_DMADescTypeDef *)rt_calloc(ETH_RXBUFNB, sizeof(ETH_DMADescTypeDef));
+    if (DMARxDscrTab == RT_NULL)
+    {
+        LOG_E("No memory");
+        state = -RT_ENOMEM;
+        goto __exit;
+    }
+
+    DMATxDscrTab = (ETH_DMADescTypeDef *)rt_calloc(ETH_TXBUFNB, sizeof(ETH_DMADescTypeDef));
+    if (DMATxDscrTab == RT_NULL)
+    {
+        LOG_E("No memory");
+        state = -RT_ENOMEM;
+        goto __exit;
+    }
+
+    stm32_eth_device.ETH_Speed = ETH_SPEED_100M;
+    stm32_eth_device.ETH_Mode  = ETH_MODE_FULLDUPLEX;
+
+    /* OUI 00-80-E1 STMICROELECTRONICS. */
+    stm32_eth_device.dev_addr[0] = 0x00;
+    stm32_eth_device.dev_addr[1] = 0x80;
+    stm32_eth_device.dev_addr[2] = 0xE1;
+    /* generate MAC addr from 96bit unique ID (only for test). */
+    stm32_eth_device.dev_addr[3] = *(rt_uint8_t *)(UID_BASE + 4);
+    stm32_eth_device.dev_addr[4] = *(rt_uint8_t *)(UID_BASE + 2);
+    stm32_eth_device.dev_addr[5] = *(rt_uint8_t *)(UID_BASE + 0);
+
+    stm32_eth_device.parent.parent.init       = rt_stm32_eth_init;
+    stm32_eth_device.parent.parent.open       = rt_stm32_eth_open;
+    stm32_eth_device.parent.parent.close      = rt_stm32_eth_close;
+    stm32_eth_device.parent.parent.read       = rt_stm32_eth_read;
+    stm32_eth_device.parent.parent.write      = rt_stm32_eth_write;
+    stm32_eth_device.parent.parent.control    = rt_stm32_eth_control;
+    stm32_eth_device.parent.parent.user_data  = RT_NULL;
+
+    stm32_eth_device.parent.eth_rx     = rt_stm32_eth_rx;
+    stm32_eth_device.parent.eth_tx     = rt_stm32_eth_tx;
+
+    /* register eth device */
+    state = eth_device_init(&(stm32_eth_device.parent), "e0");
+    if (RT_EOK == state)
+    {
+        LOG_D("emac device init success");
+    }
+    else
+    {
+        LOG_E("emac device init faild: %d", state);
+        state = -RT_ERROR;
+        goto __exit;
+    }
+
+    /* start phy monitor */
+    rt_thread_t tid;
+    tid = rt_thread_create("phy",
+                           phy_monitor_thread_entry,
+                           RT_NULL,
+                           1024,
+                           RT_THREAD_PRIORITY_MAX - 2,
+                           2);
+    if (tid != RT_NULL)
+    {
+        rt_thread_startup(tid);
+    }
+    else
+    {
+        state = -RT_ERROR;
+    }
+__exit:
+    if (state != RT_EOK)
+    {
+        if (Rx_Buff)
+        {
+            rt_free(Rx_Buff);
+        }
+
+        if (Tx_Buff)
+        {
+            rt_free(Tx_Buff);
+        }
+
+        if (DMARxDscrTab)
+        {
+            rt_free(DMARxDscrTab);
+        }
+
+        if (DMATxDscrTab)
+        {
+            rt_free(DMATxDscrTab);
+        }
+    }
+
+    return state;
+}
+INIT_DEVICE_EXPORT(rt_hw_stm32_eth_init);
+
+#endif /* BSP_USING_ETH */
+

Application_SY2/drivers/drv_flash_f1.c

@@ -0,0 +1,275 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-5      SummerGift   first version
+ * 2020-03-05     redoc        support stm32f103vg
+ *
+ */
+
+#include "board.h"
+
+#ifdef BSP_USING_ON_CHIP_FLASH
+//#include "drv_config.h"
+#include "drv_flash.h"
+
+#if defined(PKG_USING_FAL)
+#include "fal.h"
+#endif
+
+//#define DRV_DEBUG
+#define LOG_TAG                "drv.flash"
+#include <drv_log.h>
+
+/**
+  * @brief  Gets the page of a given address
+  * @param  Addr: Address of the FLASH Memory
+  * @retval The page of a given address
+  */
+static uint32_t GetPage(uint32_t addr)
+{
+    uint32_t page = 0;
+    page = RT_ALIGN_DOWN(addr, FLASH_PAGE_SIZE);
+    return page;
+}
+
+/**
+ * Read data from flash.
+ * @note This operation's units is word.
+ *
+ * @param addr flash address
+ * @param buf buffer to store read data
+ * @param size read bytes size
+ *
+ * @return result
+ */
+int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
+{
+    size_t i;
+
+    if ((addr + size) > STM32_FLASH_END_ADDRESS)
+    {
+        LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
+        return -RT_EINVAL;
+    }
+
+    for (i = 0; i < size; i++, buf++, addr++)
+    {
+        *buf = *(rt_uint8_t *) addr;
+    }
+
+    return size;
+}
+
+/**
+ * Write data to flash.
+ * @note This operation's units is word.
+ * @note This operation must after erase. @see flash_erase.
+ *
+ * @param addr flash address
+ * @param buf the write data buffer
+ * @param size write bytes size
+ *
+ * @return result
+ */
+int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
+{
+    rt_err_t result        = RT_EOK;
+    rt_uint32_t end_addr   = addr + size;
+
+    if (addr % 4 != 0)
+    {
+        LOG_E("write addr must be 4-byte alignment");
+        return -RT_EINVAL;
+    }
+
+    if ((end_addr) > STM32_FLASH_END_ADDRESS)
+    {
+        LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
+        return -RT_EINVAL;
+    }
+    //APM32此处关闭中断
+    __disable_irq();
+    HAL_FLASH_Unlock();
+
+    while (addr < end_addr)
+    {
+        if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, addr, *((rt_uint32_t *)buf)) == HAL_OK)
+        {
+            if (*(rt_uint32_t *)addr != *(rt_uint32_t *)buf)
+            {
+                result = -RT_ERROR;
+                break;
+            }
+            addr += 4;
+            buf  += 4;
+        }
+        else
+        {
+            result = -RT_ERROR;
+            break;
+        }
+    }
+
+    HAL_FLASH_Lock();
+    //打开中断
+    __enable_irq();
+    if (result != RT_EOK)
+    {
+        return result;
+    }
+
+    return size;
+}
+
+/**
+ * Erase data on flash with bank.
+ * @note This operation is irreversible.
+ * @note This operation's units is different which on many chips.
+ *
+ * @param bank flash bank
+ * @param addr flash address
+ * @param size erase bytes size
+ *
+ * @return result
+ */
+int stm32_flash_erase_bank(uint32_t bank, rt_uint32_t addr, size_t size)
+{
+    rt_err_t result = RT_EOK;
+    uint32_t PAGEError = 0;
+
+    /*Variable used for Erase procedure*/
+    FLASH_EraseInitTypeDef EraseInitStruct;
+
+    if ((addr + size) > STM32_FLASH_END_ADDRESS)
+    {
+        LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
+        return -RT_EINVAL;
+    }
+
+    HAL_FLASH_Unlock();
+
+    /* Fill EraseInit structure*/
+    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
+    EraseInitStruct.PageAddress = GetPage(addr);
+    EraseInitStruct.NbPages     = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
+    EraseInitStruct.Banks       = bank;
+    
+    if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK)
+    {
+        result = -RT_ERROR;
+        goto __exit;
+    }
+
+__exit:
+    HAL_FLASH_Lock();
+
+    if (result != RT_EOK)
+    {
+        return result;
+    }
+
+    LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
+    return size;
+}
+
+/**
+ * Erase data on flash .
+ * @note This operation is irreversible.
+ * @note This operation's units is different which on many chips.
+ *
+ * @param addr flash address
+ * @param size erase bytes size
+ *
+ * @return result
+ */
+int stm32_flash_erase(rt_uint32_t addr, size_t size)
+{
+#if defined(FLASH_BANK2_END)    
+    rt_err_t result = RT_EOK;   
+    rt_uint32_t addr_bank1 = 0;
+    rt_uint32_t size_bank1 = 0;
+    rt_uint32_t addr_bank2 = 0;
+    rt_uint32_t size_bank2 = 0;
+
+    if((addr + size) <= FLASH_BANK1_END)
+    {
+        addr_bank1 = addr;
+        size_bank1 = size;
+        size_bank2 = 0;
+    }
+    else if(addr > FLASH_BANK1_END)
+    {
+        size_bank1 = 0;
+        addr_bank2 = addr;
+        size_bank2 = size; 
+    }
+    else
+    {
+        addr_bank1 = addr;
+        size_bank1 = FLASH_BANK1_END + 1 - addr_bank1;
+        addr_bank2 = FLASH_BANK1_END + 1;
+        size_bank2 = addr + size - (FLASH_BANK1_END + 1);
+    }
+
+    if(size_bank1)
+    {
+        LOG_D("bank1: addr (0x%p), size %d", (void *)addr_bank1, size_bank1);
+        if(size_bank1 != stm32_flash_erase_bank(FLASH_BANK_1, addr_bank1, size_bank1))
+        {
+            result = -RT_ERROR;
+            goto __exit;
+        }
+    }
+    
+    if(size_bank2)
+    {
+        LOG_D("bank2: addr (0x%p), size %d", (void *)addr_bank2, size_bank2);
+        if(size_bank2 != stm32_flash_erase_bank(FLASH_BANK_2, addr_bank2, size_bank2))
+        {
+            result = -RT_ERROR;
+            goto __exit;
+        }
+    }
+
+__exit:    
+    if(result != RT_EOK)
+    {
+        return result;
+    }
+    
+    return size_bank1 + size_bank2;
+#else
+    return stm32_flash_erase_bank(FLASH_BANK_1, addr, size);
+#endif
+}
+
+
+#if defined(PKG_USING_FAL)
+
+static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
+static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
+static int fal_flash_erase(long offset, size_t size);
+
+const struct fal_flash_dev stm32_onchip_flash = { "onchip_flash", STM32_FLASH_START_ADRESS, STM32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} };
+
+static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
+{
+    return stm32_flash_read(stm32_onchip_flash.addr + offset, buf, size);
+}
+
+static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
+{
+    return stm32_flash_write(stm32_onchip_flash.addr + offset, buf, size);
+}
+
+static int fal_flash_erase(long offset, size_t size)
+{
+    return stm32_flash_erase(stm32_onchip_flash.addr + offset, size);
+}
+
+#endif
+#endif /* BSP_USING_ON_CHIP_FLASH */

Application_SY2/drivers/drv_gpio.c

@@ -0,0 +1,811 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2018-11-06     balanceTWK        first version
+ * 2019-04-23     WillianChan       Fix GPIO serial number disorder
+ */
+
+#include "board.h"
+#include "drv_common.h"
+
+#ifdef RT_USING_PIN
+
+#include <rtdevice.h>
+
+#define __STM32_PIN(index, gpio, gpio_index)                                \
+    {                                                                       \
+        index, GPIO##gpio, GPIO_PIN_##gpio_index                            \
+    }
+
+#define __STM32_PIN_RESERVE                                                 \
+    {                                                                       \
+        -1, 0, 0                                                            \
+    }
+
+/* STM32 GPIO driver */
+struct pin_index
+{
+    int index;
+    GPIO_TypeDef *gpio;
+    uint32_t pin;
+};
+
+struct pin_irq_map
+{
+    rt_uint16_t pinbit;
+    IRQn_Type irqno;
+};
+
+
+static const struct pin_index pins[] = 
+{
+#if defined(GPIOA)
+    __STM32_PIN(0 ,  A, 0 ),
+    __STM32_PIN(1 ,  A, 1 ),
+    __STM32_PIN(2 ,  A, 2 ),
+    __STM32_PIN(3 ,  A, 3 ),
+    __STM32_PIN(4 ,  A, 4 ),
+    __STM32_PIN(5 ,  A, 5 ),
+    __STM32_PIN(6 ,  A, 6 ),
+    __STM32_PIN(7 ,  A, 7 ),
+    __STM32_PIN(8 ,  A, 8 ),
+    __STM32_PIN(9 ,  A, 9 ),
+    __STM32_PIN(10,  A, 10),
+    __STM32_PIN(11,  A, 11),
+    __STM32_PIN(12,  A, 12),
+    __STM32_PIN(13,  A, 13),
+    __STM32_PIN(14,  A, 14),
+    __STM32_PIN(15,  A, 15),
+#if defined(GPIOB)
+    __STM32_PIN(16,  B, 0),
+    __STM32_PIN(17,  B, 1),
+    __STM32_PIN(18,  B, 2),
+    __STM32_PIN(19,  B, 3),
+    __STM32_PIN(20,  B, 4),
+    __STM32_PIN(21,  B, 5),
+    __STM32_PIN(22,  B, 6),
+    __STM32_PIN(23,  B, 7),
+    __STM32_PIN(24,  B, 8),
+    __STM32_PIN(25,  B, 9),
+    __STM32_PIN(26,  B, 10),
+    __STM32_PIN(27,  B, 11),
+    __STM32_PIN(28,  B, 12),
+    __STM32_PIN(29,  B, 13),
+    __STM32_PIN(30,  B, 14),
+    __STM32_PIN(31,  B, 15),
+#if defined(GPIOC)
+    __STM32_PIN(32,  C, 0),
+    __STM32_PIN(33,  C, 1),
+    __STM32_PIN(34,  C, 2),
+    __STM32_PIN(35,  C, 3),
+    __STM32_PIN(36,  C, 4),
+    __STM32_PIN(37,  C, 5),
+    __STM32_PIN(38,  C, 6),
+    __STM32_PIN(39,  C, 7),
+    __STM32_PIN(40,  C, 8),
+    __STM32_PIN(41,  C, 9),
+    __STM32_PIN(42,  C, 10),
+    __STM32_PIN(43,  C, 11),
+    __STM32_PIN(44,  C, 12),
+    __STM32_PIN(45,  C, 13),
+    __STM32_PIN(46,  C, 14),
+    __STM32_PIN(47,  C, 15),
+#if defined(GPIOD)
+    __STM32_PIN(48,  D, 0),
+    __STM32_PIN(49,  D, 1),
+    __STM32_PIN(50,  D, 2),
+    __STM32_PIN(51,  D, 3),
+    __STM32_PIN(52,  D, 4),
+    __STM32_PIN(53,  D, 5),
+    __STM32_PIN(54,  D, 6),
+    __STM32_PIN(55,  D, 7),
+    __STM32_PIN(56,  D, 8),
+    __STM32_PIN(57,  D, 9),
+    __STM32_PIN(58,  D, 10),
+    __STM32_PIN(59,  D, 11),
+    __STM32_PIN(60,  D, 12),
+    __STM32_PIN(61,  D, 13),
+    __STM32_PIN(62,  D, 14),
+    __STM32_PIN(63,  D, 15),
+#if defined(GPIOE)
+    __STM32_PIN(64,  E, 0),
+    __STM32_PIN(65,  E, 1),
+    __STM32_PIN(66,  E, 2),
+    __STM32_PIN(67,  E, 3),
+    __STM32_PIN(68,  E, 4),
+    __STM32_PIN(69,  E, 5),
+    __STM32_PIN(70,  E, 6),
+    __STM32_PIN(71,  E, 7),
+    __STM32_PIN(72,  E, 8),
+    __STM32_PIN(73,  E, 9),
+    __STM32_PIN(74,  E, 10),
+    __STM32_PIN(75,  E, 11),
+    __STM32_PIN(76,  E, 12),
+    __STM32_PIN(77,  E, 13),
+    __STM32_PIN(78,  E, 14),
+    __STM32_PIN(79,  E, 15),
+#if defined(GPIOF)
+    __STM32_PIN(80,  F, 0),
+    __STM32_PIN(81,  F, 1),
+    __STM32_PIN(82,  F, 2),
+    __STM32_PIN(83,  F, 3),
+    __STM32_PIN(84,  F, 4),
+    __STM32_PIN(85,  F, 5),
+    __STM32_PIN(86,  F, 6),
+    __STM32_PIN(87,  F, 7),
+    __STM32_PIN(88,  F, 8),
+    __STM32_PIN(89,  F, 9),
+    __STM32_PIN(90,  F, 10),
+    __STM32_PIN(91,  F, 11),
+    __STM32_PIN(92,  F, 12),
+    __STM32_PIN(93,  F, 13),
+    __STM32_PIN(94,  F, 14),
+    __STM32_PIN(95,  F, 15),
+#if defined(GPIOG)
+    __STM32_PIN(96,  G, 0),
+    __STM32_PIN(97,  G, 1),
+    __STM32_PIN(98,  G, 2),
+    __STM32_PIN(99,  G, 3),
+    __STM32_PIN(100, G, 4),
+    __STM32_PIN(101, G, 5),
+    __STM32_PIN(102, G, 6),
+    __STM32_PIN(103, G, 7),
+    __STM32_PIN(104, G, 8),
+    __STM32_PIN(105, G, 9),
+    __STM32_PIN(106, G, 10),
+    __STM32_PIN(107, G, 11),
+    __STM32_PIN(108, G, 12),
+    __STM32_PIN(109, G, 13),
+    __STM32_PIN(110, G, 14),
+    __STM32_PIN(111, G, 15),
+#if defined(GPIOH)
+    __STM32_PIN(112, H, 0),
+    __STM32_PIN(113, H, 1),
+    __STM32_PIN(114, H, 2),
+    __STM32_PIN(115, H, 3),
+    __STM32_PIN(116, H, 4),
+    __STM32_PIN(117, H, 5),
+    __STM32_PIN(118, H, 6),
+    __STM32_PIN(119, H, 7),
+    __STM32_PIN(120, H, 8),
+    __STM32_PIN(121, H, 9),
+    __STM32_PIN(122, H, 10),
+    __STM32_PIN(123, H, 11),
+    __STM32_PIN(124, H, 12),
+    __STM32_PIN(125, H, 13),
+    __STM32_PIN(126, H, 14),
+    __STM32_PIN(127, H, 15),
+#if defined(GPIOI)
+    __STM32_PIN(128, I, 0),
+    __STM32_PIN(129, I, 1),
+    __STM32_PIN(130, I, 2),
+    __STM32_PIN(131, I, 3),
+    __STM32_PIN(132, I, 4),
+    __STM32_PIN(133, I, 5),
+    __STM32_PIN(134, I, 6),
+    __STM32_PIN(135, I, 7),
+    __STM32_PIN(136, I, 8),
+    __STM32_PIN(137, I, 9),
+    __STM32_PIN(138, I, 10),
+    __STM32_PIN(139, I, 11),
+    __STM32_PIN(140, I, 12),
+    __STM32_PIN(141, I, 13),
+    __STM32_PIN(142, I, 14),
+    __STM32_PIN(143, I, 15),
+#if defined(GPIOJ)
+    __STM32_PIN(144, J, 0),
+    __STM32_PIN(145, J, 1),
+    __STM32_PIN(146, J, 2),
+    __STM32_PIN(147, J, 3),
+    __STM32_PIN(148, J, 4),
+    __STM32_PIN(149, J, 5),
+    __STM32_PIN(150, J, 6),
+    __STM32_PIN(151, J, 7),
+    __STM32_PIN(152, J, 8),
+    __STM32_PIN(153, J, 9),
+    __STM32_PIN(154, J, 10),
+    __STM32_PIN(155, J, 11),
+    __STM32_PIN(156, J, 12),
+    __STM32_PIN(157, J, 13),
+    __STM32_PIN(158, J, 14),
+    __STM32_PIN(159, J, 15),
+#if defined(GPIOK)
+    __STM32_PIN(160, K, 0),
+    __STM32_PIN(161, K, 1),
+    __STM32_PIN(162, K, 2),
+    __STM32_PIN(163, K, 3),
+    __STM32_PIN(164, K, 4),
+    __STM32_PIN(165, K, 5),
+    __STM32_PIN(166, K, 6),
+    __STM32_PIN(167, K, 7),
+    __STM32_PIN(168, K, 8),
+    __STM32_PIN(169, K, 9),
+    __STM32_PIN(170, K, 10),
+    __STM32_PIN(171, K, 11),
+    __STM32_PIN(172, K, 12),
+    __STM32_PIN(173, K, 13),
+    __STM32_PIN(174, K, 14),
+    __STM32_PIN(175, K, 15),
+#endif /* defined(GPIOK) */
+#endif /* defined(GPIOJ) */
+#endif /* defined(GPIOI) */
+#endif /* defined(GPIOH) */
+#endif /* defined(GPIOG) */
+#endif /* defined(GPIOF) */
+#endif /* defined(GPIOE) */
+#endif /* defined(GPIOD) */
+#endif /* defined(GPIOC) */
+#endif /* defined(GPIOB) */
+#endif /* defined(GPIOA) */
+};
+
+static const struct pin_irq_map pin_irq_map[] =
+{
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)
+    {GPIO_PIN_0, EXTI0_1_IRQn},
+    {GPIO_PIN_1, EXTI0_1_IRQn},
+    {GPIO_PIN_2, EXTI2_3_IRQn},
+    {GPIO_PIN_3, EXTI2_3_IRQn},
+    {GPIO_PIN_4, EXTI4_15_IRQn},
+    {GPIO_PIN_5, EXTI4_15_IRQn},
+    {GPIO_PIN_6, EXTI4_15_IRQn},
+    {GPIO_PIN_7, EXTI4_15_IRQn},
+    {GPIO_PIN_8, EXTI4_15_IRQn},
+    {GPIO_PIN_9, EXTI4_15_IRQn},
+    {GPIO_PIN_10, EXTI4_15_IRQn},
+    {GPIO_PIN_11, EXTI4_15_IRQn},
+    {GPIO_PIN_12, EXTI4_15_IRQn},
+    {GPIO_PIN_13, EXTI4_15_IRQn},
+    {GPIO_PIN_14, EXTI4_15_IRQn},
+    {GPIO_PIN_15, EXTI4_15_IRQn}, 
+#else
+    {GPIO_PIN_0, EXTI0_IRQn},
+    {GPIO_PIN_1, EXTI1_IRQn},
+    {GPIO_PIN_2, EXTI2_IRQn},
+    {GPIO_PIN_3, EXTI3_IRQn},
+    {GPIO_PIN_4, EXTI4_IRQn},
+    {GPIO_PIN_5, EXTI9_5_IRQn},
+    {GPIO_PIN_6, EXTI9_5_IRQn},
+    {GPIO_PIN_7, EXTI9_5_IRQn},
+    {GPIO_PIN_8, EXTI9_5_IRQn},
+    {GPIO_PIN_9, EXTI9_5_IRQn},
+    {GPIO_PIN_10, EXTI15_10_IRQn},
+    {GPIO_PIN_11, EXTI15_10_IRQn},
+    {GPIO_PIN_12, EXTI15_10_IRQn},
+    {GPIO_PIN_13, EXTI15_10_IRQn},
+    {GPIO_PIN_14, EXTI15_10_IRQn},
+    {GPIO_PIN_15, EXTI15_10_IRQn},
+#endif
+};
+
+static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
+{
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+    {-1, 0, RT_NULL, RT_NULL},
+};
+static uint32_t pin_irq_enable_mask=0;
+
+#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
+static const struct pin_index *get_pin(uint8_t pin)
+{
+    const struct pin_index *index;
+
+    if (pin < ITEM_NUM(pins))
+    {
+        index = &pins[pin];
+        if (index->index == -1)
+            index = RT_NULL;
+    }
+    else
+    {
+        index = RT_NULL;
+    }
+
+    return index;
+};
+
+static void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
+{
+    const struct pin_index *index;
+
+    index = get_pin(pin);
+    if (index == RT_NULL)
+    {
+        return;
+    }
+
+    HAL_GPIO_WritePin(index->gpio, index->pin, (GPIO_PinState)value);
+}
+
+static int stm32_pin_read(rt_device_t dev, rt_base_t pin)
+{
+    int value;
+    const struct pin_index *index;
+
+    value = PIN_LOW;
+
+    index = get_pin(pin);
+    if (index == RT_NULL)
+    {
+        return value;
+    }
+
+    value = HAL_GPIO_ReadPin(index->gpio, index->pin);
+
+    return value;
+}
+
+static void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
+{
+    const struct pin_index *index;
+    GPIO_InitTypeDef GPIO_InitStruct;
+
+    index = get_pin(pin);
+    if (index == RT_NULL)
+    {
+        return;
+    }
+
+    /* Configure GPIO_InitStructure */
+    GPIO_InitStruct.Pin = index->pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+
+    if (mode == PIN_MODE_OUTPUT)
+    {
+        /* output setting */
+        GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+    }
+    else if (mode == PIN_MODE_INPUT)
+    {
+        /* input setting: not pull. */
+        GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+    }
+    else if (mode == PIN_MODE_INPUT_PULLUP)
+    {
+        /* input setting: pull up. */
+        GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+        GPIO_InitStruct.Pull = GPIO_PULLUP;
+    }
+    else if (mode == PIN_MODE_INPUT_PULLDOWN)
+    {
+        /* input setting: pull down. */
+        GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+        GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+    }
+    else if (mode == PIN_MODE_OUTPUT_OD)
+    {
+        /* output setting: od. */
+        GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+    }
+
+    HAL_GPIO_Init(index->gpio, &GPIO_InitStruct);
+}
+
+rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
+{
+    int i;
+    for (i = 0; i < 32; i++)
+    {
+        if ((0x01 << i) == bit)
+        {
+            return i;
+        }
+    }
+    return -1;
+}
+
+rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
+{
+    rt_int32_t mapindex = bit2bitno(pinbit);
+    if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
+    {
+        return RT_NULL;
+    }
+    return &pin_irq_map[mapindex];
+};
+
+static rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
+                                     rt_uint32_t mode, void (*hdr)(void *args), void *args)
+{
+    const struct pin_index *index;
+    rt_base_t level;
+    rt_int32_t irqindex = -1;
+
+    index = get_pin(pin);
+    if (index == RT_NULL)
+    {
+        return RT_ENOSYS;
+    }
+    irqindex = bit2bitno(index->pin);
+    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
+    {
+        return RT_ENOSYS;
+    }
+
+    level = rt_hw_interrupt_disable();
+    if (pin_irq_hdr_tab[irqindex].pin == pin &&
+            pin_irq_hdr_tab[irqindex].hdr == hdr &&
+            pin_irq_hdr_tab[irqindex].mode == mode &&
+            pin_irq_hdr_tab[irqindex].args == args)
+    {
+        rt_hw_interrupt_enable(level);
+        return RT_EOK;
+    }
+    if (pin_irq_hdr_tab[irqindex].pin != -1)
+    {
+        rt_hw_interrupt_enable(level);
+        return RT_EBUSY;
+    }
+    pin_irq_hdr_tab[irqindex].pin = pin;
+    pin_irq_hdr_tab[irqindex].hdr = hdr;
+    pin_irq_hdr_tab[irqindex].mode = mode;
+    pin_irq_hdr_tab[irqindex].args = args;
+    rt_hw_interrupt_enable(level);
+
+    return RT_EOK;
+}
+
+static rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
+{
+    const struct pin_index *index;
+    rt_base_t level;
+    rt_int32_t irqindex = -1;
+
+    index = get_pin(pin);
+    if (index == RT_NULL)
+    {
+        return RT_ENOSYS;
+    }
+    irqindex = bit2bitno(index->pin);
+    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
+    {
+        return RT_ENOSYS;
+    }
+
+    level = rt_hw_interrupt_disable();
+    if (pin_irq_hdr_tab[irqindex].pin == -1)
+    {
+        rt_hw_interrupt_enable(level);
+        return RT_EOK;
+    }
+    pin_irq_hdr_tab[irqindex].pin = -1;
+    pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
+    pin_irq_hdr_tab[irqindex].mode = 0;
+    pin_irq_hdr_tab[irqindex].args = RT_NULL;
+    rt_hw_interrupt_enable(level);
+
+    return RT_EOK;
+}
+
+static rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
+                                     rt_uint32_t enabled)
+{
+    const struct pin_index *index;
+    const struct pin_irq_map *irqmap;
+    rt_base_t level;
+    rt_int32_t irqindex = -1;
+    GPIO_InitTypeDef GPIO_InitStruct;
+
+    index = get_pin(pin);
+    if (index == RT_NULL)
+    {
+        return RT_ENOSYS;
+    }
+
+    if (enabled == PIN_IRQ_ENABLE)
+    {
+        irqindex = bit2bitno(index->pin);
+        if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
+        {
+            return RT_ENOSYS;
+        }
+
+        level = rt_hw_interrupt_disable();
+
+        if (pin_irq_hdr_tab[irqindex].pin == -1)
+        {
+            rt_hw_interrupt_enable(level);
+            return RT_ENOSYS;
+        }
+
+        irqmap = &pin_irq_map[irqindex];
+
+        /* Configure GPIO_InitStructure */
+        GPIO_InitStruct.Pin = index->pin;        
+        GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+        switch (pin_irq_hdr_tab[irqindex].mode)
+        {
+        case PIN_IRQ_MODE_RISING:
+            GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+            GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+            break;
+        case PIN_IRQ_MODE_FALLING:
+            GPIO_InitStruct.Pull = GPIO_PULLUP;
+            GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
+            break;
+        case PIN_IRQ_MODE_RISING_FALLING:
+            GPIO_InitStruct.Pull = GPIO_NOPULL;
+            GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
+            break;
+        }
+        HAL_GPIO_Init(index->gpio, &GPIO_InitStruct);
+
+        HAL_NVIC_SetPriority(irqmap->irqno, 5, 0);
+        HAL_NVIC_EnableIRQ(irqmap->irqno);
+        pin_irq_enable_mask |= irqmap->pinbit;
+
+        rt_hw_interrupt_enable(level);
+    }
+    else if (enabled == PIN_IRQ_DISABLE)
+    {
+        irqmap = get_pin_irq_map(index->pin);
+        if (irqmap == RT_NULL)
+        {
+            return RT_ENOSYS;
+        }
+
+        level = rt_hw_interrupt_disable();
+
+        HAL_GPIO_DeInit(index->gpio, index->pin);
+
+        pin_irq_enable_mask &= ~irqmap->pinbit;
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+        if (( irqmap->pinbit>=GPIO_PIN_0 )&&( irqmap->pinbit<=GPIO_PIN_1 ))
+        {
+            if(!(pin_irq_enable_mask&(GPIO_PIN_0|GPIO_PIN_1)))
+            {    
+                HAL_NVIC_DisableIRQ(irqmap->irqno);
+            }
+        }
+        else if (( irqmap->pinbit>=GPIO_PIN_2 )&&( irqmap->pinbit<=GPIO_PIN_3 ))
+        {
+            if(!(pin_irq_enable_mask&(GPIO_PIN_2|GPIO_PIN_3)))
+            {    
+                HAL_NVIC_DisableIRQ(irqmap->irqno);
+            }
+        }
+        else if (( irqmap->pinbit>=GPIO_PIN_4 )&&( irqmap->pinbit<=GPIO_PIN_15 ))
+        {
+            if(!(pin_irq_enable_mask&(GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|
+                                      GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15)))
+            {    
+                HAL_NVIC_DisableIRQ(irqmap->irqno);
+            }
+        }    
+        else
+        {
+            HAL_NVIC_DisableIRQ(irqmap->irqno);
+        }         
+#else      
+        if (( irqmap->pinbit>=GPIO_PIN_5 )&&( irqmap->pinbit<=GPIO_PIN_9 ))
+        {
+            if(!(pin_irq_enable_mask&(GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9)))
+            {    
+                HAL_NVIC_DisableIRQ(irqmap->irqno);
+            }
+        }
+        else if (( irqmap->pinbit>=GPIO_PIN_10 )&&( irqmap->pinbit<=GPIO_PIN_15 ))
+        {
+            if(!(pin_irq_enable_mask&(GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15)))
+            {    
+                HAL_NVIC_DisableIRQ(irqmap->irqno);
+            }
+        }
+        else
+        {
+            HAL_NVIC_DisableIRQ(irqmap->irqno);
+        }        
+#endif          
+        rt_hw_interrupt_enable(level);  
+    }
+    else
+    {
+        return -RT_ENOSYS;
+    }
+
+    return RT_EOK;
+}
+const static struct rt_pin_ops _stm32_pin_ops =
+{
+    stm32_pin_mode,
+    stm32_pin_write,
+    stm32_pin_read,
+    stm32_pin_attach_irq,
+    stm32_pin_dettach_irq,
+    stm32_pin_irq_enable,
+};
+
+rt_inline void pin_irq_hdr(int irqno)
+{
+    if (pin_irq_hdr_tab[irqno].hdr)
+    {
+        pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
+    }
+}
+
+#if defined(SOC_SERIES_STM32G0)
+void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)
+{
+    pin_irq_hdr(bit2bitno(GPIO_Pin));
+}
+
+void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin)
+{
+    pin_irq_hdr(bit2bitno(GPIO_Pin));
+}
+#else
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+    pin_irq_hdr(bit2bitno(GPIO_Pin));
+}
+#endif
+
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32L0)
+void EXTI0_1_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
+    rt_interrupt_leave();
+}
+
+void EXTI2_3_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
+    rt_interrupt_leave();
+}
+void EXTI4_15_IRQHandler(void)
+{
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_14);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_15);
+}
+
+#else
+
+void EXTI0_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
+    rt_interrupt_leave();
+}
+
+void EXTI1_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
+    rt_interrupt_leave();
+}
+
+void EXTI2_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
+    rt_interrupt_leave();
+}
+
+void EXTI3_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
+    rt_interrupt_leave();
+}
+
+void EXTI4_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+    rt_interrupt_leave();
+}
+
+void EXTI9_5_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
+    rt_interrupt_leave();
+}
+
+void EXTI15_10_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_14);
+    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_15);
+    rt_interrupt_leave();
+}
+#endif
+
+int rt_hw_pin_init(void)
+{
+#if defined(__HAL_RCC_GPIOA_CLK_ENABLE)
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+#endif
+    
+#if defined(__HAL_RCC_GPIOB_CLK_ENABLE)
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+#endif
+    
+#if defined(__HAL_RCC_GPIOC_CLK_ENABLE)
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+#endif
+    
+#if defined(__HAL_RCC_GPIOD_CLK_ENABLE)
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+#endif
+
+#if defined(__HAL_RCC_GPIOE_CLK_ENABLE)
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+#endif
+
+#if defined(__HAL_RCC_GPIOF_CLK_ENABLE)
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+#endif
+
+#if defined(__HAL_RCC_GPIOG_CLK_ENABLE)
+    #ifdef SOC_SERIES_STM32L4
+        HAL_PWREx_EnableVddIO2();
+    #endif
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+#endif
+
+#if defined(__HAL_RCC_GPIOH_CLK_ENABLE)
+    __HAL_RCC_GPIOH_CLK_ENABLE();
+#endif
+
+#if defined(__HAL_RCC_GPIOI_CLK_ENABLE)
+    __HAL_RCC_GPIOI_CLK_ENABLE();
+#endif
+
+#if defined(__HAL_RCC_GPIOJ_CLK_ENABLE)
+    __HAL_RCC_GPIOJ_CLK_ENABLE();
+#endif
+
+#if defined(__HAL_RCC_GPIOK_CLK_ENABLE)
+    __HAL_RCC_GPIOK_CLK_ENABLE();
+#endif
+
+    return rt_device_pin_register("pin", &_stm32_pin_ops, RT_NULL);
+}
+
+#endif /* RT_USING_PIN */

Application_SY2/drivers/drv_hwtimer.c

@@ -0,0 +1,555 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-10     zylx         first version
+ */
+
+#include <board.h>
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#ifdef BSP_USING_TIM
+#include "drv_config.h"
+
+//#define DRV_DEBUG
+#define LOG_TAG             "drv.hwtimer"
+#include <drv_log.h>
+
+#ifdef RT_USING_HWTIMER
+enum
+{
+#ifdef BSP_USING_TIM1
+    TIM1_INDEX,
+#endif
+#ifdef BSP_USING_TIM2
+    TIM2_INDEX,
+#endif
+#ifdef BSP_USING_TIM3
+    TIM3_INDEX,
+#endif
+#ifdef BSP_USING_TIM4
+    TIM4_INDEX,
+#endif
+#ifdef BSP_USING_TIM5
+    TIM5_INDEX,
+#endif
+#ifdef BSP_USING_TIM6
+    TIM6_INDEX,
+#endif
+#ifdef BSP_USING_TIM7
+    TIM7_INDEX,
+#endif
+#ifdef BSP_USING_TIM8
+    TIM8_INDEX,
+#endif
+#ifdef BSP_USING_TIM9
+    TIM9_INDEX,
+#endif
+#ifdef BSP_USING_TIM10
+    TIM10_INDEX,
+#endif
+#ifdef BSP_USING_TIM11
+    TIM11_INDEX,
+#endif
+#ifdef BSP_USING_TIM12
+    TIM12_INDEX,
+#endif
+#ifdef BSP_USING_TIM13
+    TIM13_INDEX,
+#endif
+#ifdef BSP_USING_TIM14
+    TIM14_INDEX,
+#endif
+#ifdef BSP_USING_TIM15
+    TIM15_INDEX,
+#endif
+#ifdef BSP_USING_TIM16
+    TIM16_INDEX,
+#endif
+#ifdef BSP_USING_TIM17
+    TIM17_INDEX,
+#endif
+};
+
+struct stm32_hwtimer
+{
+    rt_hwtimer_t time_device;
+    TIM_HandleTypeDef    tim_handle;
+    IRQn_Type tim_irqn;
+    char *name;
+};
+
+static struct stm32_hwtimer stm32_hwtimer_obj[] =
+{
+#ifdef BSP_USING_TIM1
+    TIM1_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM2
+    TIM2_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM3
+    TIM3_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM4
+    TIM4_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM5
+    TIM5_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM6
+    TIM6_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM7
+    TIM7_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM8
+    TIM8_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM9
+    TIM9_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM10
+    TIM10_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM11
+    TIM11_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM12
+    TIM12_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM13
+    TIM13_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM14
+    TIM14_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM15
+    TIM15_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM16
+    TIM16_CONFIG,
+#endif
+
+#ifdef BSP_USING_TIM17
+    TIM17_CONFIG,
+#endif
+};
+
+static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
+{
+    uint32_t prescaler_value = 0;
+    TIM_HandleTypeDef *tim = RT_NULL;
+    struct stm32_hwtimer *tim_device = RT_NULL;
+
+    RT_ASSERT(timer != RT_NULL);
+    if (state)
+    {
+        tim = (TIM_HandleTypeDef *)timer->parent.user_data;
+        tim_device = (struct stm32_hwtimer *)timer;
+
+        /* time init */
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+        if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
+#elif defined(SOC_SERIES_STM32L4)
+        if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
+#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+        if (0)
+#endif
+        {
+#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
+            prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * 2 / 10000) - 1;
+#endif
+        }
+        else
+        {
+            prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * 2 / 10000) - 1;
+        }
+        tim->Init.Period            = 10000 - 1;
+        tim->Init.Prescaler         = prescaler_value;
+        tim->Init.ClockDivision     = TIM_CLOCKDIVISION_DIV1;
+        if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
+        {
+            tim->Init.CounterMode   = TIM_COUNTERMODE_UP;
+        }
+        else
+        {
+            tim->Init.CounterMode   = TIM_COUNTERMODE_DOWN;
+        }
+        tim->Init.RepetitionCounter = 0;
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+        tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+#endif
+        if (HAL_TIM_Base_Init(tim) != HAL_OK)
+        {
+            LOG_E("%s init failed", tim_device->name);
+            return;
+        }
+        else
+        {
+            /* set the TIMx priority */
+            HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
+
+            /* enable the TIMx global Interrupt */
+            HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
+
+            /* clear update flag */
+            __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
+            /* enable update request source */
+            __HAL_TIM_URS_ENABLE(tim);
+
+            LOG_D("%s init success", tim_device->name);
+        }
+    }
+}
+
+static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
+{
+    rt_err_t result = RT_EOK;
+    TIM_HandleTypeDef *tim = RT_NULL;
+
+    RT_ASSERT(timer != RT_NULL);
+
+    tim = (TIM_HandleTypeDef *)timer->parent.user_data;
+
+    /* set tim cnt */
+    __HAL_TIM_SET_COUNTER(tim, 0);
+    /* set tim arr */
+    __HAL_TIM_SET_AUTORELOAD(tim, t - 1);
+
+    if (opmode == HWTIMER_MODE_ONESHOT)
+    {
+        /* set timer to single mode */
+        tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
+    }
+    else
+    {
+        tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE);
+    }
+	
+    /* start timer */
+    if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
+    {
+        LOG_E("TIM start failed");
+        result = -RT_ERROR;
+    }
+
+    return result;
+}
+
+static void timer_stop(rt_hwtimer_t *timer)
+{
+    TIM_HandleTypeDef *tim = RT_NULL;
+
+    RT_ASSERT(timer != RT_NULL);
+
+    tim = (TIM_HandleTypeDef *)timer->parent.user_data;
+
+    /* stop timer */
+    HAL_TIM_Base_Stop_IT(tim);
+
+    /* set tim cnt */
+    __HAL_TIM_SET_COUNTER(tim, 0);
+}
+
+static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
+{
+    TIM_HandleTypeDef *tim = RT_NULL;
+    rt_err_t result = RT_EOK;
+
+    RT_ASSERT(timer != RT_NULL);
+    RT_ASSERT(arg != RT_NULL);
+
+    tim = (TIM_HandleTypeDef *)timer->parent.user_data;
+
+    switch (cmd)
+    {
+    case HWTIMER_CTRL_FREQ_SET:
+    {
+        rt_uint32_t freq;
+        rt_uint16_t val;
+
+        /* set timer frequence */
+        freq = *((rt_uint32_t *)arg);
+
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+        if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
+#elif defined(SOC_SERIES_STM32L4)
+        if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
+#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+        if (0)
+#endif
+        {
+#if defined(SOC_SERIES_STM32L4)
+            val = HAL_RCC_GetPCLK2Freq() / freq;
+#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+            val = HAL_RCC_GetPCLK2Freq() * 2 / freq;
+#endif
+        }
+        else
+        {
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+            val = HAL_RCC_GetPCLK1Freq() * 2 / freq;
+#elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+            val = HAL_RCC_GetPCLK1Freq() / freq;
+#endif
+        }
+        __HAL_TIM_SET_PRESCALER(tim, val - 1);
+
+        /* Update frequency value */
+        tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
+    }
+    break;
+    default:
+    {
+        result = -RT_ENOSYS;
+    }
+    break;
+    }
+
+    return result;
+}
+
+static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
+{
+    TIM_HandleTypeDef *tim = RT_NULL;
+
+    RT_ASSERT(timer != RT_NULL);
+
+    tim = (TIM_HandleTypeDef *)timer->parent.user_data;
+
+    return tim->Instance->CNT;
+}
+
+static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
+
+static const struct rt_hwtimer_ops _ops =
+{
+    .init = timer_init,
+    .start = timer_start,
+    .stop = timer_stop,
+    .count_get = timer_counter_get,
+    .control = timer_ctrl,
+};
+
+#ifdef BSP_USING_TIM2
+void TIM2_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM3
+void TIM3_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM4
+void TIM4_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM5
+void TIM5_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM11
+void TIM1_TRG_COM_TIM11_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM13
+void TIM8_UP_TIM13_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM14
+#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+    void TIM8_TRG_COM_TIM14_IRQHandler(void)
+#elif defined(SOC_SERIES_STM32F0)
+    void TIM14_IRQHandler(void)
+#endif
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM15
+void TIM1_BRK_TIM15_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM16
+#if defined(SOC_SERIES_STM32L4)
+    void TIM1_UP_TIM16_IRQHandler(void)
+#elif defined(SOC_SERIES_STM32F0)
+    void TIM16_IRQHandler(void)
+#endif
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+#ifdef BSP_USING_TIM17
+#if defined(SOC_SERIES_STM32L4)
+    void TIM1_TRG_COM_TIM17_IRQHandler(void)
+#elif defined(SOC_SERIES_STM32F0)
+    void TIM17_IRQHandler(void)
+#endif
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+#ifdef BSP_USING_TIM2
+    if (htim->Instance == TIM2)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM3
+    if (htim->Instance == TIM3)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM4
+    if (htim->Instance == TIM4)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM5
+    if (htim->Instance == TIM5)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM11
+    if (htim->Instance == TIM11)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM13
+    if (htim->Instance == TIM13)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM14
+    if (htim->Instance == TIM14)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM15
+    if (htim->Instance == TIM15)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM16
+    if (htim->Instance == TIM16)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
+    }
+#endif
+#ifdef BSP_USING_TIM17
+    if (htim->Instance == TIM17)
+    {
+        rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
+    }
+#endif
+}
+
+static int stm32_hwtimer_init(void)
+{
+    int i = 0;
+    int result = RT_EOK;
+
+    for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
+    {
+        stm32_hwtimer_obj[i].time_device.info = &_info;
+        stm32_hwtimer_obj[i].time_device.ops  = &_ops;
+        if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
+        {
+            LOG_D("%s register success", stm32_hwtimer_obj[i].name);
+        }
+        else
+        {
+            LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
+            result = -RT_ERROR;
+        }
+    }
+
+    return result;
+}
+INIT_BOARD_EXPORT(stm32_hwtimer_init);
+
+#endif /* RT_USING_HWTIMER */
+#endif /* BSP_USING_TIM */

Application_SY2/drivers/drv_pwm.c

@@ -0,0 +1,571 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-13     zylx         first version
+ */
+
+#include <board.h>
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#ifdef RT_USING_PWM
+#include "drv_config.h"
+
+//#define DRV_DEBUG
+#define LOG_TAG             "drv.pwm"
+#include <drv_log.h>
+
+#define MAX_PERIOD 65535
+#define MIN_PERIOD 3
+#define MIN_PULSE 2
+
+
+
+
+
+
+extern void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
+enum
+{
+#ifdef BSP_USING_PWM1
+    PWM1_INDEX,
+#endif
+#ifdef BSP_USING_PWM2
+    PWM2_INDEX,
+#endif
+#ifdef BSP_USING_PWM3
+    PWM3_INDEX,
+#endif
+#ifdef BSP_USING_PWM4
+    PWM4_INDEX,
+#endif
+#ifdef BSP_USING_PWM5
+    PWM5_INDEX,
+#endif
+#ifdef BSP_USING_PWM6
+    PWM6_INDEX,
+#endif
+#ifdef BSP_USING_PWM7
+    PWM7_INDEX,
+#endif
+#ifdef BSP_USING_PWM8
+    PWM8_INDEX,
+#endif
+#ifdef BSP_USING_PWM9
+    PWM9_INDEX,
+#endif
+#ifdef BSP_USING_PWM10
+    PWM10_INDEX,
+#endif
+#ifdef BSP_USING_PWM11
+    PWM11_INDEX,
+#endif
+#ifdef BSP_USING_PWM12
+    PWM12_INDEX,
+#endif
+#ifdef BSP_USING_PWM13
+    PWM13_INDEX,
+#endif
+#ifdef BSP_USING_PWM14
+    PWM14_INDEX,
+#endif
+#ifdef BSP_USING_PWM15
+    PWM15_INDEX,
+#endif
+#ifdef BSP_USING_PWM16
+    PWM16_INDEX,
+#endif
+#ifdef BSP_USING_PWM17
+    PWM17_INDEX,
+#endif
+};
+
+struct stm32_pwm
+{
+    struct rt_device_pwm pwm_device;
+    TIM_HandleTypeDef    tim_handle;
+    rt_uint8_t channel;
+    char *name;
+};
+
+static struct stm32_pwm stm32_pwm_obj[] =
+{
+#ifdef BSP_USING_PWM1
+    PWM1_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM2
+    PWM2_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM3
+    PWM3_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM4
+    PWM4_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM5
+    PWM5_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM6
+    PWM6_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM7
+    PWM7_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM8
+    PWM8_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM9
+    PWM9_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM10
+    PWM10_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM11
+    PWM11_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM12
+    PWM12_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM13
+    PWM13_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM14
+    PWM14_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM15
+    PWM15_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM16
+    PWM16_CONFIG,
+#endif
+
+#ifdef BSP_USING_PWM17
+    PWM17_CONFIG,
+#endif
+};
+
+static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg);
+static struct rt_pwm_ops drv_ops =
+{
+    drv_pwm_control
+};
+
+static rt_err_t drv_pwm_enable(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration, rt_bool_t enable)
+{
+    /* Converts the channel number to the channel number of Hal library */
+    rt_uint32_t channel = 0x04 * (configuration->channel - 1);
+
+    if (!enable)
+    {
+        HAL_TIM_PWM_Stop(htim, channel);
+    }
+    else
+    {
+        HAL_TIM_PWM_Start(htim, channel);
+    }
+
+    return RT_EOK;
+}
+
+static rt_err_t drv_pwm_get(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration)
+{
+    /* Converts the channel number to the channel number of Hal library */
+    rt_uint32_t channel = 0x04 * (configuration->channel - 1);
+    rt_uint64_t tim_clock;
+
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+    if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11)
+#elif defined(SOC_SERIES_STM32L4)
+    if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17)
+#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+    if (0)
+#endif
+    {
+#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
+        tim_clock = HAL_RCC_GetPCLK2Freq() * 2;
+#endif
+    }
+    else
+    {
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+        tim_clock = HAL_RCC_GetPCLK1Freq();
+#else
+        tim_clock = HAL_RCC_GetPCLK1Freq() * 2;
+#endif
+    }
+
+    if (__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV2)
+    {
+        tim_clock = tim_clock / 2;
+    }
+    else if (__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV4)
+    {
+        tim_clock = tim_clock / 4;
+    }
+
+    /* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
+    tim_clock /= 1000000UL;
+    configuration->period = (__HAL_TIM_GET_AUTORELOAD(htim) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock;
+    configuration->pulse = (__HAL_TIM_GET_COMPARE(htim, channel) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock;
+
+    return RT_EOK;
+}
+
+static rt_err_t drv_pwm_set(TIM_HandleTypeDef *htim, struct rt_pwm_configuration *configuration)
+{
+    rt_uint32_t period, pulse;
+    rt_uint64_t tim_clock, psc;
+    /* Converts the channel number to the channel number of Hal library */
+    rt_uint32_t channel = 0x04 * (configuration->channel - 1);
+
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+    if (htim->Instance == TIM9 || htim->Instance == TIM10 || htim->Instance == TIM11)
+#elif defined(SOC_SERIES_STM32L4)
+    if (htim->Instance == TIM15 || htim->Instance == TIM16 || htim->Instance == TIM17)
+#elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+    if (0)
+#endif
+    {
+#if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
+        tim_clock = HAL_RCC_GetPCLK2Freq() * 2;
+#endif
+    }
+    else
+    {
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+        tim_clock = HAL_RCC_GetPCLK1Freq();
+#else
+        tim_clock = HAL_RCC_GetPCLK1Freq() * 2;
+#endif
+    }
+
+    /* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
+    tim_clock /= 1000000UL;
+    period = (unsigned long long)configuration->period * tim_clock / 1000ULL ;
+    psc = period / MAX_PERIOD + 1;
+    period = period / psc;
+    __HAL_TIM_SET_PRESCALER(htim, psc - 1);
+
+    if (period < MIN_PERIOD)
+    {
+        period = MIN_PERIOD;
+    }
+    __HAL_TIM_SET_AUTORELOAD(htim, period - 1);
+
+    pulse = (unsigned long long)configuration->pulse * tim_clock / psc / 1000ULL;
+    if (pulse < MIN_PULSE)
+    {
+        pulse = MIN_PULSE;
+    }
+    else if (pulse > period)
+    {
+        pulse = period;
+    }
+    __HAL_TIM_SET_COMPARE(htim, channel, pulse - 1);
+    __HAL_TIM_SET_COUNTER(htim, 0);
+
+    /* Update frequency value */
+    HAL_TIM_GenerateEvent(htim, TIM_EVENTSOURCE_UPDATE);
+
+    return RT_EOK;
+}
+
+static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
+{
+    struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
+    TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)device->parent.user_data;
+
+    switch (cmd)
+    {
+    case PWM_CMD_ENABLE:
+        return drv_pwm_enable(htim, configuration, RT_TRUE);
+    case PWM_CMD_DISABLE:
+        return drv_pwm_enable(htim, configuration, RT_FALSE);
+    case PWM_CMD_SET:
+        return drv_pwm_set(htim, configuration);
+    case PWM_CMD_GET:
+        return drv_pwm_get(htim, configuration);
+    default:
+        return RT_EINVAL;
+    }
+}
+
+static rt_err_t stm32_hw_pwm_init(struct stm32_pwm *device)
+{
+    rt_err_t result = RT_EOK;
+    TIM_HandleTypeDef *tim = RT_NULL;
+    TIM_OC_InitTypeDef oc_config = {0};
+    TIM_MasterConfigTypeDef master_config = {0};
+    TIM_ClockConfigTypeDef clock_config = {0};
+
+    RT_ASSERT(device != RT_NULL);
+
+    tim = (TIM_HandleTypeDef *)&device->tim_handle;
+
+    /* configure the timer to pwm mode */
+    tim->Init.Prescaler = 0;
+    tim->Init.CounterMode = TIM_COUNTERMODE_UP;
+    tim->Init.Period = 0;
+    tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4)
+    tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+#endif
+
+    if (HAL_TIM_PWM_Init(tim) != HAL_OK)
+    {
+        LOG_E("%s pwm init failed", device->name);
+        result = -RT_ERROR;
+        goto __exit;
+    }
+
+    clock_config.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+    if (HAL_TIM_ConfigClockSource(tim, &clock_config) != HAL_OK)
+    {
+        LOG_E("%s clock init failed", device->name);
+        result = -RT_ERROR;
+        goto __exit;
+    }
+
+    master_config.MasterOutputTrigger = TIM_TRGO_RESET;
+    master_config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+    if (HAL_TIMEx_MasterConfigSynchronization(tim, &master_config) != HAL_OK)
+    {
+        LOG_E("%s master config failed", device->name);
+        result = -RT_ERROR;
+        goto __exit;
+    }
+
+    oc_config.OCMode = TIM_OCMODE_PWM1;
+    oc_config.Pulse = 0;
+    oc_config.OCPolarity = TIM_OCPOLARITY_HIGH;
+    oc_config.OCFastMode = TIM_OCFAST_DISABLE;
+    oc_config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
+    oc_config.OCIdleState  = TIM_OCIDLESTATE_RESET;
+
+    /* config pwm channel */
+    if (device->channel & 0x01)
+    {
+        if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_1) != HAL_OK)
+        {
+            LOG_E("%s channel1 config failed", device->name);
+            result = -RT_ERROR;
+            goto __exit;
+        }
+    }
+
+    if (device->channel & 0x02)
+    {
+        if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_2) != HAL_OK)
+        {
+            LOG_E("%s channel2 config failed", device->name);
+            result = -RT_ERROR;
+            goto __exit;
+        }
+    }
+
+    if (device->channel & 0x04)
+    {
+        if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_3) != HAL_OK)
+        {
+            LOG_E("%s channel3 config failed", device->name);
+            result = -RT_ERROR;
+            goto __exit;
+        }
+    }
+
+    if (device->channel & 0x08)
+    {
+        if (HAL_TIM_PWM_ConfigChannel(tim, &oc_config, TIM_CHANNEL_4) != HAL_OK)
+        {
+            LOG_E("%s channel4 config failed", device->name);
+            result = -RT_ERROR;
+            goto __exit;
+        }
+    }
+
+    /* pwm pin configuration */
+    HAL_TIM_MspPostInit(tim);
+
+    /* enable update request source */
+    __HAL_TIM_URS_ENABLE(tim);
+
+__exit:
+    return result;
+}
+
+static void pwm_get_channel(void)
+{
+#ifdef BSP_USING_PWM1_CH1
+    stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM1_CH2
+    stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM1_CH3
+    stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM1_CH4
+    stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM2_CH1
+    stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM2_CH2
+    stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM2_CH3
+    stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM2_CH4
+    stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM3_CH1
+    stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM3_CH2
+    stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM3_CH3
+    stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM3_CH4
+    stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM4_CH1
+    stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM4_CH2
+    stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM4_CH3
+    stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM4_CH4
+    stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM5_CH1
+    stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM5_CH2
+    stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM5_CH3
+    stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM5_CH4
+    stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM6_CH1
+    stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM6_CH2
+    stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM6_CH3
+    stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM6_CH4
+    stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM7_CH1
+    stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM7_CH2
+    stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM7_CH3
+    stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM7_CH4
+    stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM8_CH1
+    stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM8_CH2
+    stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM8_CH3
+    stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM8_CH4
+    stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM9_CH1
+    stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM9_CH2
+    stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 1;
+#endif
+#ifdef BSP_USING_PWM9_CH3
+    stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 2;
+#endif
+#ifdef BSP_USING_PWM9_CH4
+    stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 3;
+#endif
+#ifdef BSP_USING_PWM12_CH1
+    stm32_pwm_obj[PWM12_INDEX].channel |= 1 << 0;
+#endif
+#ifdef BSP_USING_PWM12_CH2
+    stm32_pwm_obj[PWM12_INDEX].channel |= 1 << 1;
+#endif
+}
+
+static int stm32_pwm_init(void)
+{
+    int i = 0;
+    int result = RT_EOK;
+
+    pwm_get_channel();
+
+    for (i = 0; i < sizeof(stm32_pwm_obj) / sizeof(stm32_pwm_obj[0]); i++)
+    {
+        /* pwm init */
+        if (stm32_hw_pwm_init(&stm32_pwm_obj[i]) != RT_EOK)
+        {
+            LOG_E("%s init failed", stm32_pwm_obj[i].name);
+            result = -RT_ERROR;
+            goto __exit;
+        }
+        else
+        {
+            LOG_D("%s init success", stm32_pwm_obj[i].name);
+
+            /* register pwm device */
+            if (rt_device_pwm_register(&stm32_pwm_obj[i].pwm_device, stm32_pwm_obj[i].name, &drv_ops, &stm32_pwm_obj[i].tim_handle) == RT_EOK)
+            {
+                LOG_D("%s register success", stm32_pwm_obj[i].name);
+            }
+            else
+            {
+                LOG_E("%s register failed", stm32_pwm_obj[i].name);
+                result = -RT_ERROR;
+            }
+        }
+    }
+
+__exit:
+    return result;
+}
+INIT_DEVICE_EXPORT(stm32_pwm_init);
+#endif /* RT_USING_PWM */

Application_SY2/drivers/drv_qspi.c

@@ -0,0 +1,398 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-27     zylx         first version
+ */
+
+#include "board.h"
+#include<rtthread.h>
+#include<rtdevice.h>
+#include "drv_qspi.h"
+#include "drv_config.h"
+
+#ifdef RT_USING_QSPI
+
+#define DRV_DEBUG
+#define LOG_TAG              "drv.qspi"
+#include <drv_log.h>
+
+#if defined(BSP_USING_QSPI)
+
+struct stm32_hw_spi_cs
+{
+    uint16_t Pin;
+};
+
+struct stm32_qspi_bus
+{
+    QSPI_HandleTypeDef QSPI_Handler;
+    char *bus_name;
+#ifdef BSP_QSPI_USING_DMA
+    DMA_HandleTypeDef hdma_quadspi;
+#endif
+};
+
+struct rt_spi_bus _qspi_bus1;
+struct stm32_qspi_bus _stm32_qspi_bus;
+
+static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configuration *qspi_cfg)
+{
+    int result = RT_EOK;
+    unsigned int i = 1;
+
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(qspi_cfg != RT_NULL);
+
+    struct rt_spi_configuration *cfg = &qspi_cfg->parent;
+    struct stm32_qspi_bus *qspi_bus = device->parent.bus->parent.user_data;
+    rt_memset(&qspi_bus->QSPI_Handler, 0, sizeof(qspi_bus->QSPI_Handler));
+
+    QSPI_HandleTypeDef QSPI_Handler_config = QSPI_BUS_CONFIG;
+    qspi_bus->QSPI_Handler = QSPI_Handler_config;
+
+    while (cfg->max_hz < HAL_RCC_GetHCLKFreq() / (i + 1))
+    {
+        i++;
+        if (i == 255)
+        {
+            LOG_E("QSPI init failed, QSPI frequency(%d) is too low.", cfg->max_hz);
+            return -RT_ERROR;
+        }
+    }
+    /* 80/(1+i) */
+    qspi_bus->QSPI_Handler.Init.ClockPrescaler = i;
+
+    if (!(cfg->mode & RT_SPI_CPOL))
+    {
+        /* QSPI MODE0 */
+        qspi_bus->QSPI_Handler.Init.ClockMode = QSPI_CLOCK_MODE_0;
+    }
+    else
+    {
+        /* QSPI MODE3 */
+        qspi_bus->QSPI_Handler.Init.ClockMode = QSPI_CLOCK_MODE_3;
+    }
+
+    /* flash size */
+    qspi_bus->QSPI_Handler.Init.FlashSize = POSITION_VAL(qspi_cfg->medium_size) - 1;
+
+    result = HAL_QSPI_Init(&qspi_bus->QSPI_Handler);
+    if (result  == HAL_OK)
+    {
+        LOG_D("qspi init success!");
+    }
+    else
+    {
+        LOG_E("qspi init failed (%d)!", result);
+    }
+
+#ifdef BSP_QSPI_USING_DMA
+    /* QSPI interrupts must be enabled when using the HAL_QSPI_Receive_DMA */
+    HAL_NVIC_SetPriority(QSPI_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(QSPI_IRQn);
+    HAL_NVIC_SetPriority(QSPI_DMA_IRQ, 0, 0);
+    HAL_NVIC_EnableIRQ(QSPI_DMA_IRQ);
+
+    /* init QSPI DMA */
+    if(QSPI_DMA_RCC  == RCC_AHB1ENR_DMA1EN)
+    {
+        __HAL_RCC_DMA1_CLK_ENABLE();
+    }
+    else
+    {
+        __HAL_RCC_DMA2_CLK_ENABLE();
+    }
+    
+    HAL_DMA_DeInit(qspi_bus->QSPI_Handler.hdma);
+    DMA_HandleTypeDef hdma_quadspi_config = QSPI_DMA_CONFIG;
+    qspi_bus->hdma_quadspi = hdma_quadspi_config;
+
+    if (HAL_DMA_Init(&qspi_bus->hdma_quadspi) != HAL_OK)
+    {
+        LOG_E("qspi dma init failed (%d)!", result);
+    }
+
+    __HAL_LINKDMA(&qspi_bus->QSPI_Handler, hdma, qspi_bus->hdma_quadspi);
+#endif /* BSP_QSPI_USING_DMA */
+
+    return result;
+}
+
+static void qspi_send_cmd(struct stm32_qspi_bus *qspi_bus, struct rt_qspi_message *message)
+{
+    RT_ASSERT(qspi_bus != RT_NULL);
+    RT_ASSERT(message != RT_NULL);
+
+    QSPI_CommandTypeDef Cmdhandler;
+
+    /* set QSPI cmd struct */
+    Cmdhandler.Instruction = message->instruction.content;
+    Cmdhandler.Address = message->address.content;
+    Cmdhandler.DummyCycles = message->dummy_cycles;
+    if (message->instruction.qspi_lines == 0)
+    {
+        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_NONE;
+    }
+    else if (message->instruction.qspi_lines == 1)
+    {
+        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+    }
+    else if (message->instruction.qspi_lines == 2)
+    {
+        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_2_LINES;
+    }
+    else if (message->instruction.qspi_lines == 4)
+    {
+        Cmdhandler.InstructionMode = QSPI_INSTRUCTION_4_LINES;
+    }
+    if (message->address.qspi_lines == 0)
+    {
+        Cmdhandler.AddressMode = QSPI_ADDRESS_NONE;
+    }
+    else if (message->address.qspi_lines == 1)
+    {
+        Cmdhandler.AddressMode = QSPI_ADDRESS_1_LINE;
+    }
+    else if (message->address.qspi_lines == 2)
+    {
+        Cmdhandler.AddressMode = QSPI_ADDRESS_2_LINES;
+    }
+    else if (message->address.qspi_lines == 4)
+    {
+        Cmdhandler.AddressMode = QSPI_ADDRESS_4_LINES;
+    }
+    if (message->address.size == 24)
+    {
+        Cmdhandler.AddressSize = QSPI_ADDRESS_24_BITS;
+    }
+    else
+    {
+        Cmdhandler.AddressSize = QSPI_ADDRESS_32_BITS;
+    }
+    if (message->qspi_data_lines == 0)
+    {
+        Cmdhandler.DataMode = QSPI_DATA_NONE;
+    }
+    else if (message->qspi_data_lines == 1)
+    {
+        Cmdhandler.DataMode = QSPI_DATA_1_LINE;
+    }
+    else if (message->qspi_data_lines == 2)
+    {
+        Cmdhandler.DataMode = QSPI_DATA_2_LINES;
+    }
+    else if (message->qspi_data_lines == 4)
+    {
+        Cmdhandler.DataMode = QSPI_DATA_4_LINES;
+    }
+
+    Cmdhandler.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+    Cmdhandler.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+    Cmdhandler.DdrMode = QSPI_DDR_MODE_DISABLE;
+    Cmdhandler.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+    Cmdhandler.NbData = message->parent.length;
+    HAL_QSPI_Command(&qspi_bus->QSPI_Handler, &Cmdhandler, 5000);
+}
+
+static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message *message)
+{
+    rt_size_t len = 0;
+
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device->bus != RT_NULL);
+
+    struct rt_qspi_message *qspi_message = (struct rt_qspi_message *)message;
+    struct stm32_qspi_bus *qspi_bus = device->bus->parent.user_data;
+#ifdef BSP_QSPI_USING_SOFTCS
+    struct stm32_hw_spi_cs *cs = device->parent.user_data;
+#endif
+
+    const rt_uint8_t *sndb = message->send_buf;
+    rt_uint8_t *rcvb = message->recv_buf;
+    rt_int32_t length = message->length;
+
+#ifdef BSP_QSPI_USING_SOFTCS
+    if (message->cs_take)
+    {
+        rt_pin_write(cs->pin, 0);
+    }
+#endif
+
+    /* send data */
+    if (sndb)
+    {
+        qspi_send_cmd(qspi_bus, qspi_message);
+        if (qspi_message->parent.length != 0)
+        {
+            if (HAL_QSPI_Transmit(&qspi_bus->QSPI_Handler, (rt_uint8_t *)sndb, 5000) == HAL_OK)
+            {
+                len = length;
+            }
+            else
+            {
+                LOG_E("QSPI send data failed(%d)!", qspi_bus->QSPI_Handler.ErrorCode);
+                qspi_bus->QSPI_Handler.State = HAL_QSPI_STATE_READY;
+                goto __exit;
+            }
+        }
+        else
+        {
+            len = 1;
+        }
+    }
+    else if (rcvb)/* recv data */
+    {
+        qspi_send_cmd(qspi_bus, qspi_message);
+#ifdef BSP_QSPI_USING_DMA
+        if (HAL_QSPI_Receive_DMA(&qspi_bus->QSPI_Handler, rcvb) == HAL_OK)
+#else
+        if (HAL_QSPI_Receive(&qspi_bus->QSPI_Handler, rcvb, 5000) == HAL_OK)
+#endif
+        {
+            len = length;
+#ifdef BSP_QSPI_USING_DMA
+            while (qspi_bus->QSPI_Handler.RxXferCount != 0);
+#endif
+        }
+        else
+        {
+            LOG_E("QSPI recv data failed(%d)!", qspi_bus->QSPI_Handler.ErrorCode);
+            qspi_bus->QSPI_Handler.State = HAL_QSPI_STATE_READY;
+            goto __exit;
+        }
+    }
+
+__exit:
+#ifdef BSP_QSPI_USING_SOFTCS
+    if (message->cs_release)
+    {
+        rt_pin_write(cs->pin, 1);
+    }
+#endif
+    return len;
+}
+
+static rt_err_t qspi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration)
+{
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(configuration != RT_NULL);
+
+    struct rt_qspi_device *qspi_device = (struct rt_qspi_device *)device;
+    return stm32_qspi_init(qspi_device, &qspi_device->config);
+}
+
+static const struct rt_spi_ops stm32_qspi_ops =
+{
+    .configure = qspi_configure,
+    .xfer = qspixfer,
+};
+
+static int stm32_qspi_register_bus(struct stm32_qspi_bus *qspi_bus, const char *name)
+{
+    RT_ASSERT(qspi_bus != RT_NULL);
+    RT_ASSERT(name != RT_NULL);
+
+    _qspi_bus1.parent.user_data = qspi_bus;
+    return rt_qspi_bus_register(&_qspi_bus1, name, &stm32_qspi_ops);
+}
+
+/**
+  * @brief  This function attach device to QSPI bus.
+  * @param  device_name      QSPI device name
+  * @param  pin              QSPI cs pin number
+  * @param  data_line_width  QSPI data lines width, such as 1, 2, 4
+  * @param  enter_qspi_mode  Callback function that lets FLASH enter QSPI mode
+  * @param  exit_qspi_mode   Callback function that lets FLASH exit QSPI mode
+  * @retval 0 : success
+  *        -1 : failed
+  */
+rt_err_t stm32_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)())
+{
+    struct rt_qspi_device *qspi_device = RT_NULL;
+    struct stm32_hw_spi_cs *cs_pin = RT_NULL;
+    rt_err_t result = RT_EOK;
+
+    RT_ASSERT(bus_name != RT_NULL);
+    RT_ASSERT(device_name != RT_NULL);
+    RT_ASSERT(data_line_width == 1 || data_line_width == 2 || data_line_width == 4);
+
+    qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
+    if (qspi_device == RT_NULL)
+    {
+        LOG_E("no memory, qspi bus attach device failed!");
+        result = RT_ENOMEM;
+        goto __exit;
+    }
+    cs_pin = (struct stm32_hw_spi_cs *)rt_malloc(sizeof(struct stm32_hw_spi_cs));
+    if (qspi_device == RT_NULL)
+    {
+        LOG_E("no memory, qspi bus attach device failed!");
+        result = RT_ENOMEM;
+        goto __exit;
+    }
+
+    qspi_device->enter_qspi_mode = enter_qspi_mode;
+    qspi_device->exit_qspi_mode = exit_qspi_mode;
+    qspi_device->config.qspi_dl_width = data_line_width;
+
+    cs_pin->Pin = pin;
+#ifdef BSP_QSPI_USING_SOFTCS
+    rt_pin_mode(pin, PIN_MODE_OUTPUT);
+    rt_pin_write(pin, 1);
+#endif
+
+    result = rt_spi_bus_attach_device(&qspi_device->parent, device_name, bus_name, (void *)cs_pin);
+
+__exit:
+    if (result != RT_EOK)
+    {
+        if (qspi_device)
+        {
+            rt_free(qspi_device);
+        }
+
+        if (cs_pin)
+        {
+            rt_free(cs_pin);
+        }
+    }
+
+    return  result;
+}
+
+#ifdef BSP_QSPI_USING_DMA
+void QSPI_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_QSPI_IRQHandler(&_stm32_qspi_bus.QSPI_Handler);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+void QSPI_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&_stm32_qspi_bus.hdma_quadspi);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* BSP_QSPI_USING_DMA */
+
+static int rt_hw_qspi_bus_init(void)
+{
+    return stm32_qspi_register_bus(&_stm32_qspi_bus, "qspi1");
+}
+INIT_BOARD_EXPORT(rt_hw_qspi_bus_init);
+
+#endif /* BSP_USING_QSPI */
+#endif /* RT_USING_QSPI */

Application_SY2/drivers/drv_rtc.c

@@ -0,0 +1,302 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date         Author        Notes
+ * 2018-12-04   balanceTWK    first version
+ */
+
+#include "board.h"
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#ifdef BSP_USING_ONCHIP_RTC
+
+/*
+#ifndef HAL_RTCEx_BKUPRead
+#define HAL_RTCEx_BKUPRead(x1, x2) (~BKUP_REG_DATA)
+#endif
+#ifndef HAL_RTCEx_BKUPWrite
+#define HAL_RTCEx_BKUPWrite(x1, x2, x3)
+#endif
+*/
+#ifndef RTC_BKP_DR1
+#define RTC_BKP_DR1 RT_NULL
+#endif
+
+//#define DRV_DEBUG
+#define LOG_TAG             "drv.rtc"
+#include <drv_log.h>
+
+#define BKUP_REG_DATA 0xA0A0
+
+static struct rt_device rtc;
+
+RTC_HandleTypeDef RTC_Handler;
+uint32_t           RTC_ReadTimeCounter(RTC_HandleTypeDef *hrtc);
+HAL_StatusTypeDef RTC_WriteTimeCounter(RTC_HandleTypeDef *hrtc, uint32_t TimeCounter);
+static time_t get_rtc_timestamp(void)
+{
+//    RTC_TimeTypeDef RTC_TimeStruct = {0};
+//    RTC_DateTypeDef RTC_DateStruct = {0};
+//    struct tm tm_new;
+//
+//    HAL_RTC_GetTime(&RTC_Handler, &RTC_TimeStruct, RTC_FORMAT_BIN);
+//    HAL_RTC_GetDate(&RTC_Handler, &RTC_DateStruct, RTC_FORMAT_BIN);
+//
+//    tm_new.tm_sec  = RTC_TimeStruct.Seconds;
+//    tm_new.tm_min  = RTC_TimeStruct.Minutes;
+//    tm_new.tm_hour = RTC_TimeStruct.Hours;
+//    tm_new.tm_mday = RTC_DateStruct.Date;
+//    tm_new.tm_mon  = RTC_DateStruct.Month - 1;
+//    tm_new.tm_year = RTC_DateStruct.Year + 100;
+//
+//    LOG_D("get rtc time.");
+//    RTC_ReadTimeCounter(&RTC_Handler);
+    //return mktime(&tm_new);
+    return RTC_ReadTimeCounter(&RTC_Handler);
+}
+
+static rt_err_t set_rtc_time_stamp(time_t time_stamp)
+{
+//    RTC_TimeTypeDef RTC_TimeStruct = {0};
+//    RTC_DateTypeDef RTC_DateStruct = {0};
+//    struct tm *p_tm;
+//
+//    p_tm = localtime(&time_stamp);
+//    if (p_tm->tm_year < 100)
+//    {
+//        return -RT_ERROR;
+//    }
+//
+//    RTC_TimeStruct.Seconds = p_tm->tm_sec ;
+//    RTC_TimeStruct.Minutes = p_tm->tm_min ;
+//    RTC_TimeStruct.Hours   = p_tm->tm_hour;
+//    RTC_DateStruct.Date    = p_tm->tm_mday;
+//    RTC_DateStruct.Month   = p_tm->tm_mon + 1 ;
+//    RTC_DateStruct.Year    = p_tm->tm_year - 100;
+//    RTC_DateStruct.WeekDay = p_tm->tm_wday + 1;
+//
+//    if (HAL_RTC_SetTime(&RTC_Handler, &RTC_TimeStruct, RTC_FORMAT_BIN) != HAL_OK)
+//    {
+//        return -RT_ERROR;
+//    }
+//    if (HAL_RTC_SetDate(&RTC_Handler, &RTC_DateStruct, RTC_FORMAT_BIN) != HAL_OK)
+//    {
+//        return -RT_ERROR;
+//    }
+//
+//    LOG_D("set rtc time.");
+     HAL_RTCEx_BKUPWrite(&RTC_Handler, RTC_BKP_DR1, BKUP_REG_DATA);
+//    return RT_EOK;
+    RTC_WriteTimeCounter(&RTC_Handler,time_stamp);
+    return RT_EOK;
+}
+
+static void rt_rtc_init(void)
+{
+#ifndef SOC_SERIES_STM32H7
+    __HAL_RCC_PWR_CLK_ENABLE();
+#endif
+
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+#ifdef BSP_RTC_USING_LSI
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+    RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+#else
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+    RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+    RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
+#endif
+    HAL_RCC_OscConfig(&RCC_OscInitStruct);
+}
+
+static rt_err_t rt_rtc_config(struct rt_device *dev)
+{
+    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+    HAL_PWR_EnableBkUpAccess();
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+#ifdef BSP_RTC_USING_LSI
+    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
+#else
+    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+#endif
+    HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+    /* Enable RTC Clock */
+    __HAL_RCC_RTC_ENABLE();
+
+    RTC_Handler.Instance = RTC;
+    if (HAL_RTCEx_BKUPRead(&RTC_Handler, RTC_BKP_DR1) != BKUP_REG_DATA)
+    {
+        LOG_I("RTC hasn't been configured, please use <date> command to config.");
+
+#if defined(SOC_SERIES_STM32F1)
+        RTC_Handler.Init.OutPut = RTC_OUTPUTSOURCE_NONE;
+        RTC_Handler.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
+#elif defined(SOC_SERIES_STM32F0)
+
+        /* set the frequency division */
+#ifdef BSP_RTC_USING_LSI
+        RTC_Handler.Init.AsynchPrediv = 0XA0;
+        RTC_Handler.Init.SynchPrediv = 0xFA;
+#else
+        RTC_Handler.Init.AsynchPrediv = 0X7F;
+        RTC_Handler.Init.SynchPrediv = 0x0130;
+#endif /* BSP_RTC_USING_LSI */
+
+        RTC_Handler.Init.HourFormat = RTC_HOURFORMAT_24;
+        RTC_Handler.Init.OutPut = RTC_OUTPUT_DISABLE;
+        RTC_Handler.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+        RTC_Handler.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32H7)
+
+        /* set the frequency division */
+#ifdef BSP_RTC_USING_LSI
+        RTC_Handler.Init.AsynchPrediv = 0X7D;
+#else
+        RTC_Handler.Init.AsynchPrediv = 0X7F;
+#endif /* BSP_RTC_USING_LSI */
+        RTC_Handler.Init.SynchPrediv = 0XFF;
+
+        RTC_Handler.Init.HourFormat = RTC_HOURFORMAT_24;
+        RTC_Handler.Init.OutPut = RTC_OUTPUT_DISABLE;
+        RTC_Handler.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+        RTC_Handler.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+#endif
+        __HAL_RCC_BKP_CLK_ENABLE();
+        if (HAL_RTC_Init(&RTC_Handler) != HAL_OK)
+        {
+            return -RT_ERROR;
+        }
+    }
+    return RT_EOK;
+}
+
+static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
+{
+    rt_err_t result = RT_EOK;
+    RT_ASSERT(dev != RT_NULL);
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_RTC_GET_TIME:
+        *(rt_uint32_t *)args = get_rtc_timestamp();
+        LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
+        break;
+
+    case RT_DEVICE_CTRL_RTC_SET_TIME:
+        if (set_rtc_time_stamp(*(rt_uint32_t *)args))
+        {
+            result = -RT_ERROR;
+        }
+        LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
+        break;
+    }
+
+    return result;
+}
+
+#ifdef RT_USING_DEVICE_OPS
+const static struct rt_device_ops rtc_ops =
+{
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    rt_rtc_control
+};
+#endif
+
+static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
+{
+    RT_ASSERT(device != RT_NULL);
+
+    rt_rtc_init();
+    if (rt_rtc_config(device) != RT_EOK)
+    {
+        return -RT_ERROR;
+    }
+#ifdef RT_USING_DEVICE_OPS
+    device->ops         = &rtc_ops;
+#else
+    device->init        = RT_NULL;
+    device->open        = RT_NULL;
+    device->close       = RT_NULL;
+    device->read        = RT_NULL;
+    device->write       = RT_NULL;
+    device->control     = rt_rtc_control;
+#endif
+    device->type        = RT_Device_Class_RTC;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->user_data   = RT_NULL;
+
+    /* register a character device */
+    return rt_device_register(device, name, flag);
+}
+
+int rt_hw_rtc_init(void)
+{
+    rt_err_t result;
+    result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
+    if (result != RT_EOK)
+    {
+        LOG_E("rtc register err code: %d", result);
+        return result;
+    }
+    LOG_D("rtc init success");
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(rt_hw_rtc_init);
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+#endif /* BSP_USING_ONCHIP_RTC */
+
+
+
+
+
+
+
+

Application_SY2/drivers/drv_sdio.c

@@ -0,0 +1,889 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-06-22     tyx          first
+ * 2018-12-12     balanceTWK   first version
+ * 2019-06-11     WillianChan   Add SD card hot plug detection
+ */
+
+#include "board.h"
+#include "drv_sdio.h"
+#include "drv_config.h"
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#ifdef BSP_USING_SDIO
+
+//#define DRV_DEBUG
+#define LOG_TAG             "drv.sdio"
+#include <drv_log.h>
+
+static struct stm32_sdio_config sdio_config = SDIO_BUS_CONFIG;
+static struct stm32_sdio_class sdio_obj;
+static struct rt_mmcsd_host *host;
+
+#define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS    (100000)
+
+#define RTHW_SDIO_LOCK(_sdio)   rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER)
+#define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&_sdio->mutex);
+
+struct sdio_pkg
+{
+    struct rt_mmcsd_cmd *cmd;
+    void *buff;
+    rt_uint32_t flag;
+};
+
+struct rthw_sdio
+{
+    struct rt_mmcsd_host *host;
+    struct stm32_sdio_des sdio_des;
+    struct rt_event event;
+    struct rt_mutex mutex;
+    struct sdio_pkg *pkg;
+};
+
+ALIGN(SDIO_ALIGN_LEN)
+static rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
+
+static rt_uint32_t stm32_sdio_clk_get(struct stm32_sdio *hw_sdio)
+{
+    return SDIO_CLOCK_FREQ;
+}
+
+/**
+  * @brief  This function get order from sdio.
+  * @param  data
+  * @retval sdio  order
+  */
+static int get_order(rt_uint32_t data)
+{
+    int order = 0;
+
+    switch (data)
+    {
+    case 1:
+        order = 0;
+        break;
+    case 2:
+        order = 1;
+        break;
+    case 4:
+        order = 2;
+        break;
+    case 8:
+        order = 3;
+        break;
+    case 16:
+        order = 4;
+        break;
+    case 32:
+        order = 5;
+        break;
+    case 64:
+        order = 6;
+        break;
+    case 128:
+        order = 7;
+        break;
+    case 256:
+        order = 8;
+        break;
+    case 512:
+        order = 9;
+        break;
+    case 1024:
+        order = 10;
+        break;
+    case 2048:
+        order = 11;
+        break;
+    case 4096:
+        order = 12;
+        break;
+    case 8192:
+        order = 13;
+        break;
+    case 16384:
+        order = 14;
+        break;
+    default :
+        order = 0;
+        break;
+    }
+
+    return order;
+}
+
+/**
+  * @brief  This function wait sdio completed.
+  * @param  sdio  rthw_sdio
+  * @retval None
+  */
+static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
+{
+    rt_uint32_t status;
+    struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
+    struct rt_mmcsd_data *data = cmd->data;
+    struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
+
+    if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
+                      rt_tick_from_millisecond(5000), &status) != RT_EOK)
+    {
+        LOG_E("wait completed timeout");
+        cmd->err = -RT_ETIMEOUT;
+        return;
+    }
+
+    if (sdio->pkg == RT_NULL)
+    {
+        return;
+    }
+
+    cmd->resp[0] = hw_sdio->resp1;
+    cmd->resp[1] = hw_sdio->resp2;
+    cmd->resp[2] = hw_sdio->resp3;
+    cmd->resp[3] = hw_sdio->resp4;
+
+    if (status & HW_SDIO_ERRORS)
+    {
+        if ((status & HW_SDIO_IT_CCRCFAIL) && (resp_type(cmd) & (RESP_R3 | RESP_R4)))
+        {
+            cmd->err = RT_EOK;
+        }
+        else
+        {
+            cmd->err = -RT_ERROR;
+        }
+
+        if (status & HW_SDIO_IT_CTIMEOUT)
+        {
+            cmd->err = -RT_ETIMEOUT;
+        }
+
+        if (status & HW_SDIO_IT_DCRCFAIL)
+        {
+            data->err = -RT_ERROR;
+        }
+
+        if (status & HW_SDIO_IT_DTIMEOUT)
+        {
+            data->err = -RT_ETIMEOUT;
+        }
+
+        if (cmd->err == RT_EOK)
+        {
+            LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
+        }
+        else
+        {
+            LOG_D("err:0x%08x, %s%s%s%s%s%s%s cmd:%d arg:0x%08x rw:%c len:%d blksize:%d",
+                  status,
+                  status & HW_SDIO_IT_CCRCFAIL  ? "CCRCFAIL "    : "",
+                  status & HW_SDIO_IT_DCRCFAIL  ? "DCRCFAIL "    : "",
+                  status & HW_SDIO_IT_CTIMEOUT  ? "CTIMEOUT "    : "",
+                  status & HW_SDIO_IT_DTIMEOUT  ? "DTIMEOUT "    : "",
+                  status & HW_SDIO_IT_TXUNDERR  ? "TXUNDERR "    : "",
+                  status & HW_SDIO_IT_RXOVERR   ? "RXOVERR "     : "",
+                  status == 0                   ? "NULL"         : "",
+                  cmd->cmd_code,
+                  cmd->arg,
+                  data ? (data->flags & DATA_DIR_WRITE ?  'w' : 'r') : '-',
+                  data ? data->blks * data->blksize : 0,
+                  data ? data->blksize : 0
+                 );
+        }
+    }
+    else
+    {
+        cmd->err = RT_EOK;
+        LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
+    }
+}
+
+/**
+  * @brief  This function transfer data by dma.
+  * @param  sdio  rthw_sdio
+  * @param  pkg   sdio package
+  * @retval None
+  */
+static void rthw_sdio_transfer_by_dma(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
+{
+    struct rt_mmcsd_data *data;
+    int size;
+    void *buff;
+    struct stm32_sdio *hw_sdio;
+
+    if ((RT_NULL == pkg) || (RT_NULL == sdio))
+    {
+        LOG_E("rthw_sdio_transfer_by_dma invalid args");
+        return;
+    }
+
+    data = pkg->cmd->data;
+    if (RT_NULL == data)
+    {
+        LOG_E("rthw_sdio_transfer_by_dma invalid args");
+        return;
+    }
+
+    buff = pkg->buff;
+    if (RT_NULL == buff)
+    {
+        LOG_E("rthw_sdio_transfer_by_dma invalid args");
+        return;
+    }
+    hw_sdio = sdio->sdio_des.hw_sdio;
+    size = data->blks * data->blksize;
+
+    if (data->flags & DATA_DIR_WRITE)
+    {
+        sdio->sdio_des.txconfig((rt_uint32_t *)buff, (rt_uint32_t *)&hw_sdio->fifo, size);
+        hw_sdio->dctrl |= HW_SDIO_DMA_ENABLE;
+    }
+    else if (data->flags & DATA_DIR_READ)
+    {
+        sdio->sdio_des.rxconfig((rt_uint32_t *)&hw_sdio->fifo, (rt_uint32_t *)buff, size);
+        hw_sdio->dctrl |= HW_SDIO_DMA_ENABLE | HW_SDIO_DPSM_ENABLE;
+    }
+}
+
+/**
+  * @brief  This function send command.
+  * @param  sdio  rthw_sdio
+  * @param  pkg   sdio package
+  * @retval None
+  */
+static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
+{
+    struct rt_mmcsd_cmd *cmd = pkg->cmd;
+    struct rt_mmcsd_data *data = cmd->data;
+    struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
+    rt_uint32_t reg_cmd;
+
+    /* save pkg */
+    sdio->pkg = pkg;
+
+    LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d",
+          cmd->cmd_code,
+          cmd->arg,
+          resp_type(cmd) == RESP_NONE ? "NONE"  : "",
+          resp_type(cmd) == RESP_R1  ? "R1"  : "",
+          resp_type(cmd) == RESP_R1B ? "R1B"  : "",
+          resp_type(cmd) == RESP_R2  ? "R2"  : "",
+          resp_type(cmd) == RESP_R3  ? "R3"  : "",
+          resp_type(cmd) == RESP_R4  ? "R4"  : "",
+          resp_type(cmd) == RESP_R5  ? "R5"  : "",
+          resp_type(cmd) == RESP_R6  ? "R6"  : "",
+          resp_type(cmd) == RESP_R7  ? "R7"  : "",
+          data ? (data->flags & DATA_DIR_WRITE ?  'w' : 'r') : '-',
+          data ? data->blks * data->blksize : 0,
+          data ? data->blksize : 0
+         );
+
+    /* config cmd reg */
+    reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE;
+    if (resp_type(cmd) == RESP_NONE)
+        reg_cmd |= HW_SDIO_RESPONSE_NO;
+    else if (resp_type(cmd) == RESP_R2)
+        reg_cmd |= HW_SDIO_RESPONSE_LONG;
+    else
+        reg_cmd |= HW_SDIO_RESPONSE_SHORT;
+
+    /* config data reg */
+    if (data != RT_NULL)
+    {
+        rt_uint32_t dir = 0;
+        rt_uint32_t size = data->blks * data->blksize;
+        int order;
+
+        hw_sdio->dctrl = 0;
+        hw_sdio->dtimer = HW_SDIO_DATATIMEOUT;
+        hw_sdio->dlen = size;
+        order = get_order(data->blksize);
+        dir = (data->flags & DATA_DIR_READ) ? HW_SDIO_TO_HOST : 0;
+        hw_sdio->dctrl = HW_SDIO_IO_ENABLE | (order << 4) | dir;
+    }
+
+    /* transfer config */
+    if (data != RT_NULL)
+    {
+        rthw_sdio_transfer_by_dma(sdio, pkg);
+    }
+
+    /* open irq */
+    hw_sdio->mask |= HW_SDIO_IT_CMDSENT | HW_SDIO_IT_CMDREND | HW_SDIO_ERRORS;
+    if (data != RT_NULL)
+    {
+        hw_sdio->mask |= HW_SDIO_IT_DATAEND;
+    }
+
+    /* send cmd */
+    hw_sdio->arg = cmd->arg;
+    hw_sdio->cmd = reg_cmd;
+
+    /* wait completed */
+    rthw_sdio_wait_completed(sdio);
+
+    /* Waiting for data to be sent to completion */
+    if (data != RT_NULL)
+    {
+        volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS;
+
+        while (count && (hw_sdio->sta & (HW_SDIO_IT_TXACT | HW_SDIO_IT_RXACT)))
+        {
+            count--;
+        }
+
+        if ((count == 0) || (hw_sdio->sta & HW_SDIO_ERRORS))
+        {
+            cmd->err = -RT_ERROR;
+        }
+    }
+
+    /* close irq, keep sdio irq */
+    hw_sdio->mask = hw_sdio->mask & HW_SDIO_IT_SDIOIT ? HW_SDIO_IT_SDIOIT : 0x00;
+
+    /* clear pkg */
+    sdio->pkg = RT_NULL;
+}
+
+/**
+  * @brief  This function send sdio request.
+  * @param  sdio  rthw_sdio
+  * @param  req   request
+  * @retval None
+  */
+static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
+{
+    struct sdio_pkg pkg;
+    struct rthw_sdio *sdio = host->private_data;
+    struct rt_mmcsd_data *data;
+
+    RTHW_SDIO_LOCK(sdio);
+
+    if (req->cmd != RT_NULL)
+    {
+        memset(&pkg, 0, sizeof(pkg));
+        data = req->cmd->data;
+        pkg.cmd = req->cmd;
+
+        if (data != RT_NULL)
+        {
+            rt_uint32_t size = data->blks * data->blksize;
+
+            RT_ASSERT(size <= SDIO_BUFF_SIZE);
+
+            pkg.buff = data->buf;
+            if ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1))
+            {
+                pkg.buff = cache_buf;
+                if (data->flags & DATA_DIR_WRITE)
+                {
+                    memcpy(cache_buf, data->buf, size);
+                }
+            }
+        }
+
+        rthw_sdio_send_command(sdio, &pkg);
+
+        if ((data != RT_NULL) && (data->flags & DATA_DIR_READ) && ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1)))
+        {
+            memcpy(data->buf, cache_buf, data->blksize * data->blks);
+        }
+    }
+
+    if (req->stop != RT_NULL)
+    {
+        memset(&pkg, 0, sizeof(pkg));
+        pkg.cmd = req->stop;
+        rthw_sdio_send_command(sdio, &pkg);
+    }
+
+    RTHW_SDIO_UNLOCK(sdio);
+
+    mmcsd_req_complete(sdio->host);
+}
+
+/**
+  * @brief  This function config sdio.
+  * @param  host    rt_mmcsd_host
+  * @param  io_cfg  rt_mmcsd_io_cfg
+  * @retval None
+  */
+static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
+{
+    rt_uint32_t clkcr, div, clk_src;
+    rt_uint32_t clk = io_cfg->clock;
+    struct rthw_sdio *sdio = host->private_data;
+    struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
+
+    clk_src = sdio->sdio_des.clk_get(sdio->sdio_des.hw_sdio);
+    if (clk_src < 400 * 1000)
+    {
+        LOG_E("The clock rate is too low! rata:%d", clk_src);
+        return;
+    }
+
+    if (clk > host->freq_max) clk = host->freq_max;
+
+    if (clk > clk_src)
+    {
+        LOG_W("Setting rate is greater than clock source rate.");
+        clk = clk_src;
+    }
+
+    LOG_D("clk:%d width:%s%s%s power:%s%s%s",
+          clk,
+          io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
+          io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
+          io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
+          io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
+          io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
+          io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
+         );
+
+    RTHW_SDIO_LOCK(sdio);
+
+    div = clk_src / clk;
+    if ((clk == 0) || (div == 0))
+    {
+        clkcr = 0;
+    }
+    else
+    {
+        if (div < 2)
+        {
+            div = 2;
+        }
+        else if (div > 0xFF)
+        {
+            div = 0xFF;
+        }
+        div -= 2;
+        clkcr = div | HW_SDIO_CLK_ENABLE;
+    }
+
+    if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
+    {
+        clkcr |= HW_SDIO_BUSWIDE_8B;
+    }
+    else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
+    {
+        clkcr |= HW_SDIO_BUSWIDE_4B;
+    }
+    else
+    {
+        clkcr |= HW_SDIO_BUSWIDE_1B;
+    }
+
+    hw_sdio->clkcr = clkcr;
+
+    switch (io_cfg->power_mode)
+    {
+    case MMCSD_POWER_OFF:
+        hw_sdio->power = HW_SDIO_POWER_OFF;
+        break;
+    case MMCSD_POWER_UP:
+        hw_sdio->power = HW_SDIO_POWER_UP;
+        break;
+    case MMCSD_POWER_ON:
+        hw_sdio->power = HW_SDIO_POWER_ON;
+        break;
+    default:
+        LOG_W("unknown power_mode %d", io_cfg->power_mode);
+        break;
+    }
+
+    RTHW_SDIO_UNLOCK(sdio);
+}
+
+/**
+  * @brief  This function update sdio interrupt.
+  * @param  host    rt_mmcsd_host
+  * @param  enable
+  * @retval None
+  */
+void rthw_sdio_irq_update(struct rt_mmcsd_host *host, rt_int32_t enable)
+{
+    struct rthw_sdio *sdio = host->private_data;
+    struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
+
+    if (enable)
+    {
+        LOG_D("enable sdio irq");
+        hw_sdio->mask |= HW_SDIO_IT_SDIOIT;
+    }
+    else
+    {
+        LOG_D("disable sdio irq");
+        hw_sdio->mask &= ~HW_SDIO_IT_SDIOIT;
+    }
+}
+
+/**
+  * @brief  This function delect sdcard.
+  * @param  host    rt_mmcsd_host
+  * @retval 0x01
+  */
+static rt_int32_t rthw_sd_delect(struct rt_mmcsd_host *host)
+{
+    LOG_D("try to detect device");
+    return 0x01;
+}
+
+/**
+  * @brief  This function interrupt process function.
+  * @param  host  rt_mmcsd_host
+  * @retval None
+  */
+void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
+{
+    int complete = 0;
+    struct rthw_sdio *sdio = host->private_data;
+    struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
+    rt_uint32_t intstatus = hw_sdio->sta;
+
+    if (intstatus & HW_SDIO_ERRORS)
+    {
+        hw_sdio->icr = HW_SDIO_ERRORS;
+        complete = 1;
+    }
+    else
+    {
+        if (intstatus & HW_SDIO_IT_CMDREND)
+        {
+            hw_sdio->icr = HW_SDIO_IT_CMDREND;
+
+            if (sdio->pkg != RT_NULL)
+            {
+                if (!sdio->pkg->cmd->data)
+                {
+                    complete = 1;
+                }
+                else if ((sdio->pkg->cmd->data->flags & DATA_DIR_WRITE))
+                {
+                    hw_sdio->dctrl |= HW_SDIO_DPSM_ENABLE;
+                }
+            }
+        }
+
+        if (intstatus & HW_SDIO_IT_CMDSENT)
+        {
+            hw_sdio->icr = HW_SDIO_IT_CMDSENT;
+
+            if (resp_type(sdio->pkg->cmd) == RESP_NONE)
+            {
+                complete = 1;
+            }
+        }
+
+        if (intstatus & HW_SDIO_IT_DATAEND)
+        {
+            hw_sdio->icr = HW_SDIO_IT_DATAEND;
+            complete = 1;
+        }
+    }
+
+    if ((intstatus & HW_SDIO_IT_SDIOIT) && (hw_sdio->mask & HW_SDIO_IT_SDIOIT))
+    {
+        hw_sdio->icr = HW_SDIO_IT_SDIOIT;
+        sdio_irq_wakeup(host);
+    }
+
+    if (complete)
+    {
+        hw_sdio->mask &= ~HW_SDIO_ERRORS;
+        rt_event_send(&sdio->event, intstatus);
+    }
+}
+
+static const struct rt_mmcsd_host_ops ops =
+{
+    rthw_sdio_request,
+    rthw_sdio_iocfg,
+    rthw_sd_delect,
+    rthw_sdio_irq_update,
+};
+
+/**
+  * @brief  This function create mmcsd host.
+  * @param  sdio_des  stm32_sdio_des
+  * @retval rt_mmcsd_host
+  */
+struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
+{
+    struct rt_mmcsd_host *host;
+    struct rthw_sdio *sdio = RT_NULL;
+
+    if ((sdio_des == RT_NULL) || (sdio_des->txconfig == RT_NULL) || (sdio_des->rxconfig == RT_NULL))
+    {
+        LOG_E("L:%d F:%s %s %s %s",
+              (sdio_des == RT_NULL ? "sdio_des is NULL" : ""),
+              (sdio_des ? (sdio_des->txconfig ? "txconfig is NULL" : "") : ""),
+              (sdio_des ? (sdio_des->rxconfig ? "rxconfig is NULL" : "") : "")
+             );
+        return RT_NULL;
+    }
+
+    sdio = rt_malloc(sizeof(struct rthw_sdio));
+    if (sdio == RT_NULL)
+    {
+        LOG_E("L:%d F:%s malloc rthw_sdio fail");
+        return RT_NULL;
+    }
+    rt_memset(sdio, 0, sizeof(struct rthw_sdio));
+
+    host = mmcsd_alloc_host();
+    if (host == RT_NULL)
+    {
+        LOG_E("L:%d F:%s mmcsd alloc host fail");
+        rt_free(sdio);
+        return RT_NULL;
+    }
+
+    rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des));
+    sdio->sdio_des.hw_sdio = (sdio_des->hw_sdio == RT_NULL ? (struct stm32_sdio *)SDIO_BASE_ADDRESS : sdio_des->hw_sdio);
+    sdio->sdio_des.clk_get = (sdio_des->clk_get == RT_NULL ? stm32_sdio_clk_get : sdio_des->clk_get);
+
+    rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
+    rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO);
+
+    /* set host defautl attributes */
+    host->ops = &ops;
+    host->freq_min = 400 * 1000;
+    host->freq_max = SDIO_MAX_FREQ;
+    host->valid_ocr = 0X00FFFF80;/* The voltage range supported is 1.65v-3.6v */
+#ifndef SDIO_USING_1_BIT
+    host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
+#else
+    host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
+#endif
+    host->max_seg_size = SDIO_BUFF_SIZE;
+    host->max_dma_segs = 1;
+    host->max_blk_size = 512;
+    host->max_blk_count = 512;
+
+    /* link up host and sdio */
+    sdio->host = host;
+    host->private_data = sdio;
+
+    rthw_sdio_irq_update(host, 1);
+
+    /* ready to change */
+    mmcsd_change(host);
+
+    return host;
+}
+
+/**
+  * @brief  This function configures the DMATX.
+  * @param  BufferSRC: pointer to the source buffer
+  * @param  BufferSize: buffer size
+  * @retval None
+  */
+void SD_LowLevel_DMA_TxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize)
+{
+#if defined(SOC_SERIES_STM32F1)
+    static uint32_t size = 0;
+    size += BufferSize * 4;
+    sdio_obj.cfg = &sdio_config;
+    sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
+    sdio_obj.dma.handle_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
+    sdio_obj.dma.handle_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
+    sdio_obj.dma.handle_tx.Init.MemInc              = DMA_MINC_ENABLE;
+    sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    sdio_obj.dma.handle_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
+    sdio_obj.dma.handle_tx.Init.Priority            = DMA_PRIORITY_MEDIUM;
+    /* DMA_PFCTRL */
+    HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
+    HAL_DMA_Init(&sdio_obj.dma.handle_tx);
+
+    HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
+
+#elif defined(SOC_SERIES_STM32L4)
+    static uint32_t size = 0;
+    size += BufferSize * 4;
+    sdio_obj.cfg = &sdio_config;
+    sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
+    sdio_obj.dma.handle_tx.Init.Request             = sdio_config.dma_tx.request;
+    sdio_obj.dma.handle_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
+    sdio_obj.dma.handle_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
+    sdio_obj.dma.handle_tx.Init.MemInc              = DMA_MINC_ENABLE;
+    sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    sdio_obj.dma.handle_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
+    sdio_obj.dma.handle_tx.Init.Mode                = DMA_NORMAL;
+    sdio_obj.dma.handle_tx.Init.Priority            = DMA_PRIORITY_MEDIUM;
+
+    HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
+    HAL_DMA_Init(&sdio_obj.dma.handle_tx);
+
+    HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
+#else
+    static uint32_t size = 0;
+    size += BufferSize * 4;
+    sdio_obj.cfg = &sdio_config;
+    sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
+    sdio_obj.dma.handle_tx.Init.Channel = sdio_config.dma_tx.channel;
+    sdio_obj.dma.handle_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
+    sdio_obj.dma.handle_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
+    sdio_obj.dma.handle_tx.Init.MemInc              = DMA_MINC_ENABLE;
+    sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    sdio_obj.dma.handle_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
+    sdio_obj.dma.handle_tx.Init.Mode                = DMA_PFCTRL;
+    sdio_obj.dma.handle_tx.Init.Priority            = DMA_PRIORITY_MEDIUM;
+    sdio_obj.dma.handle_tx.Init.FIFOMode            = DMA_FIFOMODE_ENABLE;
+    sdio_obj.dma.handle_tx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
+    sdio_obj.dma.handle_tx.Init.MemBurst            = DMA_MBURST_INC4;
+    sdio_obj.dma.handle_tx.Init.PeriphBurst         = DMA_PBURST_INC4;
+    /* DMA_PFCTRL */
+    HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
+    HAL_DMA_Init(&sdio_obj.dma.handle_tx);
+
+    HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
+#endif
+}
+
+/**
+  * @brief  This function configures the DMARX.
+  * @param  BufferDST: pointer to the destination buffer
+  * @param  BufferSize: buffer size
+  * @retval None
+  */
+void SD_LowLevel_DMA_RxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize)
+{
+#if defined(SOC_SERIES_STM32F1)
+    sdio_obj.cfg = &sdio_config;
+    sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
+    sdio_obj.dma.handle_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
+    sdio_obj.dma.handle_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
+    sdio_obj.dma.handle_rx.Init.MemInc              = DMA_MINC_ENABLE;
+    sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    sdio_obj.dma.handle_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
+    sdio_obj.dma.handle_rx.Init.Priority            = DMA_PRIORITY_MEDIUM;
+
+    HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
+    HAL_DMA_Init(&sdio_obj.dma.handle_rx);
+
+    HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
+#elif defined(SOC_SERIES_STM32L4)
+    sdio_obj.cfg = &sdio_config;
+    sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
+    sdio_obj.dma.handle_rx.Init.Request             = sdio_config.dma_tx.request;
+    sdio_obj.dma.handle_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
+    sdio_obj.dma.handle_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
+    sdio_obj.dma.handle_rx.Init.MemInc              = DMA_MINC_ENABLE;
+    sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    sdio_obj.dma.handle_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
+    sdio_obj.dma.handle_rx.Init.Mode                = DMA_NORMAL;
+    sdio_obj.dma.handle_rx.Init.Priority            = DMA_PRIORITY_LOW;
+
+    HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
+    HAL_DMA_Init(&sdio_obj.dma.handle_rx);
+
+    HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
+#else
+    sdio_obj.cfg = &sdio_config;
+    sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
+    sdio_obj.dma.handle_rx.Init.Channel = sdio_config.dma_tx.channel;
+    sdio_obj.dma.handle_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
+    sdio_obj.dma.handle_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
+    sdio_obj.dma.handle_rx.Init.MemInc              = DMA_MINC_ENABLE;
+    sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    sdio_obj.dma.handle_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
+    sdio_obj.dma.handle_rx.Init.Mode                = DMA_PFCTRL;
+    sdio_obj.dma.handle_rx.Init.Priority            = DMA_PRIORITY_MEDIUM;
+    sdio_obj.dma.handle_rx.Init.FIFOMode            = DMA_FIFOMODE_ENABLE;
+    sdio_obj.dma.handle_rx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
+    sdio_obj.dma.handle_rx.Init.MemBurst            = DMA_MBURST_INC4;
+    sdio_obj.dma.handle_rx.Init.PeriphBurst         = DMA_PBURST_INC4;
+
+    HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
+    HAL_DMA_Init(&sdio_obj.dma.handle_rx);
+
+    HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
+#endif
+
+}
+
+/**
+  * @brief  This function get stm32 sdio clock.
+  * @param  hw_sdio: stm32_sdio
+  * @retval PCLK2Freq
+  */
+static rt_uint32_t stm32_sdio_clock_get(struct stm32_sdio *hw_sdio)
+{
+    return HAL_RCC_GetPCLK2Freq();
+}
+
+static rt_err_t DMA_TxConfig(rt_uint32_t *src, rt_uint32_t *dst, int Size)
+{
+    SD_LowLevel_DMA_TxConfig((uint32_t *)src, (uint32_t *)dst, Size / 4);
+    return RT_EOK;
+}
+
+static rt_err_t DMA_RxConfig(rt_uint32_t *src, rt_uint32_t *dst, int Size)
+{
+    SD_LowLevel_DMA_RxConfig((uint32_t *)src, (uint32_t *)dst, Size / 4);
+    return RT_EOK;
+}
+
+void SDIO_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    /* Process All SDIO Interrupt Sources */
+    rthw_sdio_irq_process(host);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+int rt_hw_sdio_init(void)
+{
+    struct stm32_sdio_des sdio_des;
+    SD_HandleTypeDef hsd;
+    hsd.Instance = SDCARD_INSTANCE;
+    {
+        rt_uint32_t tmpreg = 0x00U;
+#if defined(SOC_SERIES_STM32F1)
+        /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
+        SET_BIT(RCC->AHBENR, sdio_config.dma_rx.dma_rcc);
+        tmpreg = READ_BIT(RCC->AHBENR, sdio_config.dma_rx.dma_rcc);
+#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
+        SET_BIT(RCC->AHB1ENR, sdio_config.dma_rx.dma_rcc);
+        /* Delay after an RCC peripheral clock enabling */
+        tmpreg = READ_BIT(RCC->AHB1ENR, sdio_config.dma_rx.dma_rcc);
+#endif
+        UNUSED(tmpreg); /* To avoid compiler warnings */
+    }
+    HAL_NVIC_SetPriority(SDIO_IRQn, 2, 0);
+    HAL_NVIC_EnableIRQ(SDIO_IRQn);
+    HAL_SD_MspInit(&hsd);
+
+    sdio_des.clk_get = stm32_sdio_clock_get;
+    sdio_des.hw_sdio = (struct stm32_sdio *)SDCARD_INSTANCE;
+    sdio_des.rxconfig = DMA_RxConfig;
+    sdio_des.txconfig = DMA_TxConfig;
+
+    host = sdio_host_create(&sdio_des);
+    if (host == RT_NULL)
+    {
+        LOG_E("host create fail");
+        return -1;
+    }
+
+    return 0;
+}
+INIT_DEVICE_EXPORT(rt_hw_sdio_init);
+
+void stm32_mmcsd_change(void)
+{
+    mmcsd_change(host);
+}
+
+#endif

Application_SY2/drivers/drv_soft_i2c.c

@@ -0,0 +1,220 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-08     balanceTWK   first version
+ */
+
+#include <board.h>
+#include "drv_soft_i2c.h"
+#include "drv_config.h"
+#include<rtthread.h>
+#include<rtdevice.h>
+#ifdef RT_USING_I2C
+//#define DRV_DEBUG
+#define LOG_TAG              "drv.i2c"
+#include <drv_log.h>
+
+#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4)
+#error "Please define at least one BSP_USING_I2Cx"
+#endif
+
+static const struct stm32_soft_i2c_config soft_i2c_config[] =
+{
+#ifdef BSP_USING_I2C1
+    I2C1_BUS_CONFIG,
+#endif
+#ifdef BSP_USING_I2C2
+    I2C2_BUS_CONFIG,
+#endif
+#ifdef BSP_USING_I2C3
+    I2C3_BUS_CONFIG,
+#endif
+#ifdef BSP_USING_I2C4
+    I2C4_BUS_CONFIG,
+#endif
+};
+
+static struct stm32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
+
+/**
+ * This function initializes the i2c pin.
+ *
+ * @param Stm32 i2c dirver class.
+ */
+static void stm32_i2c_gpio_init(struct stm32_i2c *i2c)
+{
+    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)i2c->ops.data;
+
+    rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
+    rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
+
+    rt_pin_write(cfg->scl, PIN_HIGH);
+    rt_pin_write(cfg->sda, PIN_HIGH);
+}
+
+/**
+ * This function sets the sda pin.
+ *
+ * @param Stm32 config class.
+ * @param The sda pin state.
+ */
+static void stm32_set_sda(void *data, rt_int32_t state)
+{
+    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
+    if (state)
+    {
+        rt_pin_write(cfg->sda, PIN_HIGH);
+    }
+    else
+    {
+        rt_pin_write(cfg->sda, PIN_LOW);
+    }
+}
+
+/**
+ * This function sets the scl pin.
+ *
+ * @param Stm32 config class.
+ * @param The scl pin state.
+ */
+static void stm32_set_scl(void *data, rt_int32_t state)
+{
+    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
+    if (state)
+    {
+        rt_pin_write(cfg->scl, PIN_HIGH);
+    }
+    else
+    {
+        rt_pin_write(cfg->scl, PIN_LOW);
+    }
+}
+
+/**
+ * This function gets the sda pin state.
+ *
+ * @param The sda pin state.
+ */
+static rt_int32_t stm32_get_sda(void *data)
+{
+    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
+    return rt_pin_read(cfg->sda);
+}
+
+/**
+ * This function gets the scl pin state.
+ *
+ * @param The scl pin state.
+ */
+static rt_int32_t stm32_get_scl(void *data)
+{
+    struct stm32_soft_i2c_config* cfg = (struct stm32_soft_i2c_config*)data;
+    return rt_pin_read(cfg->scl);
+}
+/**
+ * The time delay function.
+ *
+ * @param microseconds.
+ */
+static void stm32_udelay(rt_uint32_t us)
+{
+    rt_uint32_t ticks;
+    rt_uint32_t told, tnow, tcnt = 0;
+    rt_uint32_t reload = SysTick->LOAD;
+
+    ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
+    told = SysTick->VAL;
+    while (1)
+    {
+        tnow = SysTick->VAL;
+        if (tnow != told)
+        {
+            if (tnow < told)
+            {
+                tcnt += told - tnow;
+            }
+            else
+            {
+                tcnt += reload - tnow + told;
+            }
+            told = tnow;
+            if (tcnt >= ticks)
+            {
+                break;
+            }
+        }
+    }
+}
+
+static const struct rt_i2c_bit_ops stm32_bit_ops_default =
+{
+    .data     = RT_NULL,
+    .set_sda  = stm32_set_sda,
+    .set_scl  = stm32_set_scl,
+    .get_sda  = stm32_get_sda,
+    .get_scl  = stm32_get_scl,
+    .udelay   = stm32_udelay,
+    .delay_us = 1,
+    .timeout  = 100
+};
+
+/**
+ * if i2c is locked, this function will unlock it
+ *
+ * @param stm32 config class
+ *
+ * @return RT_EOK indicates successful unlock.
+ */
+static rt_err_t stm32_i2c_bus_unlock(const struct stm32_soft_i2c_config *cfg)
+{
+    rt_int32_t i = 0;
+
+    if (PIN_LOW == rt_pin_read(cfg->sda))
+    {
+        while (i++ < 9)
+        {
+            rt_pin_write(cfg->scl, PIN_HIGH);
+            stm32_udelay(100);
+            rt_pin_write(cfg->scl, PIN_LOW);
+            stm32_udelay(100);
+        }
+    }
+    if (PIN_LOW == rt_pin_read(cfg->sda))
+    {
+        return -RT_ERROR;
+    }
+
+    return RT_EOK;
+}
+
+/* I2C initialization function */
+int rt_hw_i2c_init(void)
+{
+    rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct stm32_i2c);
+    rt_err_t result;
+
+    for (int i = 0; i < obj_num; i++)
+    {
+        i2c_obj[i].ops = stm32_bit_ops_default;
+        i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
+        i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops;
+        stm32_i2c_gpio_init(&i2c_obj[i]);
+        result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);
+        RT_ASSERT(result == RT_EOK);
+        stm32_i2c_bus_unlock(&soft_i2c_config[i]);
+        
+        LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
+        soft_i2c_config[i].bus_name, 
+        soft_i2c_config[i].scl, 
+        soft_i2c_config[i].sda);
+    }
+
+    return RT_EOK;
+}
+INIT_BOARD_EXPORT(rt_hw_i2c_init);
+
+#endif /* RT_USING_I2C */

Application_SY2/drivers/drv_spi.c

@@ -0,0 +1,914 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-5      SummerGift   first version
+ * 2018-12-11     greedyhao    Porting for stm32f7xx
+ * 2019-01-03     zylx         modify DMA initialization and spixfer function
+ * 2020-01-15     whj4674672   Porting for stm32h7xx
+ */
+
+#include "board.h"
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#ifdef RT_USING_SPI
+
+#if defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) || defined(BSP_USING_SPI4) || defined(BSP_USING_SPI5) || defined(BSP_USING_SPI6)
+
+#include "drv_spi.h"
+#include "drv_config.h"
+#include <string.h>
+
+//#define DRV_DEBUG
+#define LOG_TAG              "drv.spi"
+#include <drv_log.h>
+
+enum
+{
+#ifdef BSP_USING_SPI1
+    SPI1_INDEX,
+#endif
+#ifdef BSP_USING_SPI2
+    SPI2_INDEX,
+#endif
+#ifdef BSP_USING_SPI3
+    SPI3_INDEX,
+#endif
+#ifdef BSP_USING_SPI4
+    SPI4_INDEX,
+#endif
+#ifdef BSP_USING_SPI5
+    SPI5_INDEX,
+#endif
+#ifdef BSP_USING_SPI6
+    SPI6_INDEX,
+#endif
+};
+
+static struct stm32_spi_config spi_config[] =
+{
+#ifdef BSP_USING_SPI1
+    SPI1_BUS_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI2
+    SPI2_BUS_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI3
+    SPI3_BUS_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI4
+    SPI4_BUS_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI5
+    SPI5_BUS_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI6
+    SPI6_BUS_CONFIG,
+#endif
+};
+
+static struct stm32_spi spi_bus_obj[sizeof(spi_config) / sizeof(spi_config[0])] = {0};
+
+static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configuration *cfg)
+{
+    RT_ASSERT(spi_drv != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+
+    SPI_HandleTypeDef *spi_handle = &spi_drv->handle;
+
+    if (cfg->mode & RT_SPI_SLAVE)
+    {
+        spi_handle->Init.Mode = SPI_MODE_SLAVE;
+    }
+    else
+    {
+        spi_handle->Init.Mode = SPI_MODE_MASTER;
+    }
+
+    if (cfg->mode & RT_SPI_3WIRE)
+    {
+        spi_handle->Init.Direction = SPI_DIRECTION_1LINE;
+    }
+    else
+    {
+        spi_handle->Init.Direction = SPI_DIRECTION_2LINES;
+    }
+
+    if (cfg->data_width == 8)
+    {
+        spi_handle->Init.DataSize = SPI_DATASIZE_8BIT;
+        spi_handle->TxXferSize = 8;
+        spi_handle->RxXferSize = 8;
+    }
+    else if (cfg->data_width == 16)
+    {
+        spi_handle->Init.DataSize = SPI_DATASIZE_16BIT;
+    }
+    else
+    {
+        return RT_EIO;
+    }
+
+    if (cfg->mode & RT_SPI_CPHA)
+    {
+        spi_handle->Init.CLKPhase = SPI_PHASE_2EDGE;
+    }
+    else
+    {
+        spi_handle->Init.CLKPhase = SPI_PHASE_1EDGE;
+    }
+
+    if (cfg->mode & RT_SPI_CPOL)
+    {
+        spi_handle->Init.CLKPolarity = SPI_POLARITY_HIGH;
+    }
+    else
+    {
+        spi_handle->Init.CLKPolarity = SPI_POLARITY_LOW;
+    }
+
+    if (cfg->mode & RT_SPI_NO_CS)
+    {
+        spi_handle->Init.NSS = SPI_NSS_SOFT;
+    }
+    else
+    {
+        spi_handle->Init.NSS = SPI_NSS_SOFT;
+    }
+
+    uint32_t SPI_APB_CLOCK;
+
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
+    SPI_APB_CLOCK = HAL_RCC_GetPCLK1Freq();
+#elif defined(SOC_SERIES_STM32H7)
+    SPI_APB_CLOCK = HAL_RCC_GetSysClockFreq();
+#else
+    SPI_APB_CLOCK = HAL_RCC_GetPCLK2Freq();
+#endif
+
+    if (cfg->max_hz >= SPI_APB_CLOCK / 2)
+    {
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+    }
+    else if (cfg->max_hz >= SPI_APB_CLOCK / 4)
+    {
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
+    }
+    else if (cfg->max_hz >= SPI_APB_CLOCK / 8)
+    {
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
+    }
+    else if (cfg->max_hz >= SPI_APB_CLOCK / 16)
+    {
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+    }
+    else if (cfg->max_hz >= SPI_APB_CLOCK / 32)
+    {
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
+    }
+    else if (cfg->max_hz >= SPI_APB_CLOCK / 64)
+    {
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
+    }
+    else if (cfg->max_hz >= SPI_APB_CLOCK / 128)
+    {
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
+    }
+    else
+    {
+        /*  min prescaler 256 */
+        spi_handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
+    }
+
+    LOG_D("sys freq: %d, pclk2 freq: %d, SPI limiting freq: %d, BaudRatePrescaler: %d",
+          HAL_RCC_GetSysClockFreq(),
+          SPI_APB_CLOCK,
+          cfg->max_hz,
+          spi_handle->Init.BaudRatePrescaler);
+
+    if (cfg->mode & RT_SPI_MSB)
+    {
+        spi_handle->Init.FirstBit = SPI_FIRSTBIT_MSB;
+    }
+    else
+    {
+        spi_handle->Init.FirstBit = SPI_FIRSTBIT_LSB;
+    }
+
+    spi_handle->Init.TIMode = SPI_TIMODE_DISABLE;
+    spi_handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+    spi_handle->State = HAL_SPI_STATE_RESET;
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32F0)
+    spi_handle->Init.NSSPMode          = SPI_NSS_PULSE_DISABLE;
+#elif defined(SOC_SERIES_STM32H7)
+    spi_handle->Init.Mode                       = SPI_MODE_MASTER;
+    spi_handle->Init.NSS                        = SPI_NSS_SOFT;
+    spi_handle->Init.NSSPMode                   = SPI_NSS_PULSE_DISABLE;
+    spi_handle->Init.NSSPolarity                = SPI_NSS_POLARITY_LOW;
+    spi_handle->Init.CRCPolynomial              = 7;
+    spi_handle->Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
+    spi_handle->Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
+    spi_handle->Init.MasterSSIdleness           = SPI_MASTER_SS_IDLENESS_00CYCLE;
+    spi_handle->Init.MasterInterDataIdleness    = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
+    spi_handle->Init.MasterReceiverAutoSusp     = SPI_MASTER_RX_AUTOSUSP_DISABLE;
+    spi_handle->Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
+    spi_handle->Init.IOSwap                     = SPI_IO_SWAP_DISABLE;
+    spi_handle->Init.FifoThreshold              = SPI_FIFO_THRESHOLD_08DATA;
+#endif
+
+    if (HAL_SPI_Init(spi_handle) != HAL_OK)
+    {
+        return RT_EIO;
+    }
+
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) \
+        || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32G0)
+    SET_BIT(spi_handle->Instance->CR2, SPI_RXFIFO_THRESHOLD_HF);
+#endif
+
+    /* DMA configuration */
+    if (spi_drv->spi_dma_flag & SPI_USING_RX_DMA_FLAG)
+    {
+        HAL_DMA_Init(&spi_drv->dma.handle_rx);
+
+        __HAL_LINKDMA(&spi_drv->handle, hdmarx, spi_drv->dma.handle_rx);
+
+        /* NVIC configuration for DMA transfer complete interrupt */
+        HAL_NVIC_SetPriority(spi_drv->config->dma_rx->dma_irq, 0, 0);
+        HAL_NVIC_EnableIRQ(spi_drv->config->dma_rx->dma_irq);
+    }
+
+    if (spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG)
+    {
+        HAL_DMA_Init(&spi_drv->dma.handle_tx);
+
+        __HAL_LINKDMA(&spi_drv->handle, hdmatx, spi_drv->dma.handle_tx);
+
+        /* NVIC configuration for DMA transfer complete interrupt */
+        HAL_NVIC_SetPriority(spi_drv->config->dma_tx->dma_irq, 0, 1);
+        HAL_NVIC_EnableIRQ(spi_drv->config->dma_tx->dma_irq);
+    }
+
+    __HAL_SPI_ENABLE(spi_handle);
+
+    LOG_D("%s init done", spi_drv->config->bus_name);
+    return RT_EOK;
+}
+
+static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
+{
+    HAL_StatusTypeDef state;
+    rt_size_t message_length, already_send_length;
+    rt_uint16_t send_length;
+    rt_uint8_t *recv_buf;
+    const rt_uint8_t *send_buf;
+
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device->bus != RT_NULL);
+    RT_ASSERT(device->bus->parent.user_data != RT_NULL);
+    RT_ASSERT(message != RT_NULL);
+
+    struct stm32_spi *spi_drv =  rt_container_of(device->bus, struct stm32_spi, spi_bus);
+    SPI_HandleTypeDef *spi_handle = &spi_drv->handle;
+    struct stm32_hw_spi_cs *cs = device->parent.user_data;
+
+    if (message->cs_take)
+    {
+        HAL_GPIO_WritePin(cs->GPIOx, cs->GPIO_Pin, GPIO_PIN_RESET);
+    }
+
+    LOG_D("%s transfer prepare and start", spi_drv->config->bus_name);
+    LOG_D("%s sendbuf: %X, recvbuf: %X, length: %d",
+          spi_drv->config->bus_name,
+          (uint32_t)message->send_buf,
+          (uint32_t)message->recv_buf, message->length);
+
+    message_length = message->length;
+    recv_buf = message->recv_buf;
+    send_buf = message->send_buf;
+    while (message_length)
+    {
+        /* the HAL library use uint16 to save the data length */
+        if (message_length > 65535)
+        {
+            send_length = 65535;
+            message_length = message_length - 65535;
+        }
+        else
+        {
+            send_length = message_length;
+            message_length = 0;
+        }
+
+        /* calculate the start address */
+        already_send_length = message->length - send_length - message_length;
+        send_buf = (rt_uint8_t *)message->send_buf + already_send_length;
+        recv_buf = (rt_uint8_t *)message->recv_buf + already_send_length;
+        
+        /* start once data exchange in DMA mode */
+        if (message->send_buf && message->recv_buf)
+        {
+            if ((spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG) && (spi_drv->spi_dma_flag & SPI_USING_RX_DMA_FLAG))
+            {
+                state = HAL_SPI_TransmitReceive_DMA(spi_handle, (uint8_t *)send_buf, (uint8_t *)recv_buf, send_length);
+            }
+            else
+            {
+                state = HAL_SPI_TransmitReceive(spi_handle, (uint8_t *)send_buf, (uint8_t *)recv_buf, send_length, 1000);
+            }
+        }
+        else if (message->send_buf)
+        {
+            if (spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG)
+            {
+                state = HAL_SPI_Transmit_DMA(spi_handle, (uint8_t *)send_buf, send_length);
+            }
+            else
+            {
+                state = HAL_SPI_Transmit(spi_handle, (uint8_t *)send_buf, send_length, 1000);
+            }
+        }
+        else
+        {
+            memset((uint8_t *)recv_buf, 0xff, send_length);
+            if (spi_drv->spi_dma_flag & SPI_USING_RX_DMA_FLAG)
+            {
+                state = HAL_SPI_Receive_DMA(spi_handle, (uint8_t *)recv_buf, send_length);
+            }
+            else
+            {
+                state = HAL_SPI_Receive(spi_handle, (uint8_t *)recv_buf, send_length, 1000);
+            }
+        }
+
+        if (state != HAL_OK)
+        {
+            LOG_I("spi transfer error : %d", state);
+            message->length = 0;
+            spi_handle->State = HAL_SPI_STATE_READY;
+        }
+        else
+        {
+            LOG_D("%s transfer done", spi_drv->config->bus_name);
+        }
+
+        /* For simplicity reasons, this example is just waiting till the end of the
+           transfer, but application may perform other tasks while transfer operation
+           is ongoing. */
+        while (HAL_SPI_GetState(spi_handle) != HAL_SPI_STATE_READY);
+    }
+
+    if (message->cs_release)
+    {
+        HAL_GPIO_WritePin(cs->GPIOx, cs->GPIO_Pin, GPIO_PIN_SET);
+    }
+
+    return message->length;
+}
+
+static rt_err_t spi_configure(struct rt_spi_device *device,
+                              struct rt_spi_configuration *configuration)
+{
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(configuration != RT_NULL);
+
+    struct stm32_spi *spi_drv =  rt_container_of(device->bus, struct stm32_spi, spi_bus);
+    spi_drv->cfg = configuration;
+
+    return stm32_spi_init(spi_drv, configuration);
+}
+
+static const struct rt_spi_ops stm_spi_ops =
+{
+    .configure = spi_configure,
+    .xfer = spixfer,
+};
+
+static int rt_hw_spi_bus_init(void)
+{
+    rt_err_t result;
+    for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++)
+    {
+        spi_bus_obj[i].config = &spi_config[i];
+        spi_bus_obj[i].spi_bus.parent.user_data = &spi_config[i];
+        spi_bus_obj[i].handle.Instance = spi_config[i].Instance;
+
+        if (spi_bus_obj[i].spi_dma_flag & SPI_USING_RX_DMA_FLAG)
+        {
+            /* Configure the DMA handler for Transmission process */
+            spi_bus_obj[i].dma.handle_rx.Instance = spi_config[i].dma_rx->Instance;
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+            spi_bus_obj[i].dma.handle_rx.Init.Channel = spi_config[i].dma_rx->channel;
+#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
+            spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request;
+#endif
+            spi_bus_obj[i].dma.handle_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
+            spi_bus_obj[i].dma.handle_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
+            spi_bus_obj[i].dma.handle_rx.Init.MemInc              = DMA_MINC_ENABLE;
+            spi_bus_obj[i].dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+            spi_bus_obj[i].dma.handle_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
+            spi_bus_obj[i].dma.handle_rx.Init.Mode                = DMA_NORMAL;
+            spi_bus_obj[i].dma.handle_rx.Init.Priority            = DMA_PRIORITY_HIGH;
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+            spi_bus_obj[i].dma.handle_rx.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
+            spi_bus_obj[i].dma.handle_rx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
+            spi_bus_obj[i].dma.handle_rx.Init.MemBurst            = DMA_MBURST_INC4;
+            spi_bus_obj[i].dma.handle_rx.Init.PeriphBurst         = DMA_PBURST_INC4;
+#endif
+
+            {
+                rt_uint32_t tmpreg = 0x00U;
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32F0)
+                /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
+                SET_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
+                tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
+#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
+                SET_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc);
+                /* Delay after an RCC peripheral clock enabling */
+                tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc);
+#endif
+                UNUSED(tmpreg); /* To avoid compiler warnings */
+            }
+        }
+
+        if (spi_bus_obj[i].spi_dma_flag & SPI_USING_TX_DMA_FLAG)
+        {
+            /* Configure the DMA handler for Transmission process */
+            spi_bus_obj[i].dma.handle_tx.Instance = spi_config[i].dma_tx->Instance;
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+            spi_bus_obj[i].dma.handle_tx.Init.Channel = spi_config[i].dma_tx->channel;
+#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
+            spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request;
+#endif
+            spi_bus_obj[i].dma.handle_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
+            spi_bus_obj[i].dma.handle_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
+            spi_bus_obj[i].dma.handle_tx.Init.MemInc              = DMA_MINC_ENABLE;
+            spi_bus_obj[i].dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+            spi_bus_obj[i].dma.handle_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
+            spi_bus_obj[i].dma.handle_tx.Init.Mode                = DMA_NORMAL;
+            spi_bus_obj[i].dma.handle_tx.Init.Priority            = DMA_PRIORITY_LOW;
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+            spi_bus_obj[i].dma.handle_tx.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
+            spi_bus_obj[i].dma.handle_tx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
+            spi_bus_obj[i].dma.handle_tx.Init.MemBurst            = DMA_MBURST_INC4;
+            spi_bus_obj[i].dma.handle_tx.Init.PeriphBurst         = DMA_PBURST_INC4;
+#endif
+
+            {
+                rt_uint32_t tmpreg = 0x00U;
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32F0)
+                /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
+                SET_BIT(RCC->AHBENR, spi_config[i].dma_tx->dma_rcc);
+                tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_tx->dma_rcc);
+#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
+                SET_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc);
+                /* Delay after an RCC peripheral clock enabling */
+                tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc);
+#endif
+                UNUSED(tmpreg); /* To avoid compiler warnings */
+            }
+        }
+
+        result = rt_spi_bus_register(&spi_bus_obj[i].spi_bus, spi_config[i].bus_name, &stm_spi_ops);
+        RT_ASSERT(result == RT_EOK);
+
+        LOG_D("%s bus init done", spi_config[i].bus_name);
+    }
+
+    return result;
+}
+
+/**
+  * Attach the spi device to SPI bus, this function must be used after initialization.
+  */
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin)
+{
+    RT_ASSERT(bus_name != RT_NULL);
+    RT_ASSERT(device_name != RT_NULL);
+
+    rt_err_t result;
+    struct rt_spi_device *spi_device;
+    struct stm32_hw_spi_cs *cs_pin;
+
+    /* initialize the cs pin && select the slave*/
+    GPIO_InitTypeDef GPIO_Initure;
+    GPIO_Initure.Pin = cs_gpio_pin;
+    GPIO_Initure.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_Initure.Pull = GPIO_PULLUP;
+    GPIO_Initure.Speed = GPIO_SPEED_FREQ_HIGH;
+    HAL_GPIO_Init(cs_gpiox, &GPIO_Initure);
+    HAL_GPIO_WritePin(cs_gpiox, cs_gpio_pin, GPIO_PIN_SET);
+
+    /* attach the device to spi bus*/
+    spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
+    RT_ASSERT(spi_device != RT_NULL);
+    cs_pin = (struct stm32_hw_spi_cs *)rt_malloc(sizeof(struct stm32_hw_spi_cs));
+    RT_ASSERT(cs_pin != RT_NULL);
+    cs_pin->GPIOx = cs_gpiox;
+    cs_pin->GPIO_Pin = cs_gpio_pin;
+    result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
+
+    if (result != RT_EOK)
+    {
+        LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
+    }
+
+    RT_ASSERT(result == RT_EOK);
+
+    LOG_D("%s attach to %s done", device_name, bus_name);
+
+    return result;
+}
+
+#if defined(BSP_SPI1_TX_USING_DMA) || defined(BSP_SPI1_RX_USING_DMA)
+void SPI1_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_SPI_IRQHandler(&spi_bus_obj[SPI1_INDEX].handle);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_RX_USING_DMA)
+/**
+  * @brief  This function handles DMA Rx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI1_DMA_RX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI1_INDEX].dma.handle_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_TX_USING_DMA)
+/**
+  * @brief  This function handles DMA Tx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI1_DMA_TX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI1_INDEX].dma.handle_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_USING_SPI1) && defined(BSP_SPI_USING_DMA) */
+
+#if defined(BSP_SPI2_TX_USING_DMA) || defined(BSP_SPI2_RX_USING_DMA)
+void SPI2_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_SPI_IRQHandler(&spi_bus_obj[SPI2_INDEX].handle);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_RX_USING_DMA)
+/**
+  * @brief  This function handles DMA Rx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI2_DMA_RX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI2_INDEX].dma.handle_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_TX_USING_DMA)
+/**
+  * @brief  This function handles DMA Tx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI2_DMA_TX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI2_INDEX].dma.handle_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_USING_SPI2) && defined(BSP_SPI_USING_DMA) */
+
+#if defined(BSP_SPI3_TX_USING_DMA) || defined(BSP_SPI3_RX_USING_DMA)
+void SPI3_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_SPI_IRQHandler(&spi_bus_obj[SPI3_INDEX].handle);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI3) && defined(BSP_SPI3_RX_USING_DMA)
+/**
+  * @brief  This function handles DMA Rx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI3_DMA_RX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI3_INDEX].dma.handle_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI3) && defined(BSP_SPI3_TX_USING_DMA)
+/**
+  * @brief  This function handles DMA Tx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI3_DMA_TX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI3_INDEX].dma.handle_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_USING_SPI3) && defined(BSP_SPI_USING_DMA) */
+
+#if defined(BSP_SPI4_TX_USING_DMA) || defined(BSP_SPI4_RX_USING_DMA)
+void SPI4_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_SPI_IRQHandler(&spi_bus_obj[SPI4_INDEX].handle);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI4) && defined(BSP_SPI4_RX_USING_DMA)
+/**
+  * @brief  This function handles DMA Rx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI4_DMA_RX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI4_INDEX].dma.handle_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI4) && defined(BSP_SPI4_TX_USING_DMA)
+/**
+  * @brief  This function handles DMA Tx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI4_DMA_TX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI4_INDEX].dma.handle_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_USING_SPI4) && defined(BSP_SPI_USING_DMA) */
+
+#if defined(BSP_SPI5_TX_USING_DMA) || defined(BSP_SPI5_RX_USING_DMA)
+void SPI5_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_SPI_IRQHandler(&spi_bus_obj[SPI5_INDEX].handle);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI5) && defined(BSP_SPI5_RX_USING_DMA)
+/**
+  * @brief  This function handles DMA Rx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI5_DMA_RX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI5_INDEX].dma.handle_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI5) && defined(BSP_SPI5_TX_USING_DMA)
+/**
+  * @brief  This function handles DMA Tx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI5_DMA_TX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI5_INDEX].dma.handle_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_USING_SPI5) && defined(BSP_SPI_USING_DMA) */
+
+#if defined(BSP_USING_SPI6) && defined(BSP_SPI6_RX_USING_DMA)
+/**
+  * @brief  This function handles DMA Rx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI6_DMA_RX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI6_INDEX].dma.handle_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(BSP_USING_SPI6) && defined(BSP_SPI6_TX_USING_DMA)
+/**
+  * @brief  This function handles DMA Tx interrupt request.
+  * @param  None
+  * @retval None
+  */
+void SPI6_DMA_TX_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    HAL_DMA_IRQHandler(&spi_bus_obj[SPI6_INDEX].dma.handle_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_USING_SPI6) && defined(BSP_SPI_USING_DMA) */
+
+static void stm32_get_dma_info(void)
+{
+#ifdef BSP_SPI1_RX_USING_DMA
+    spi_bus_obj[SPI1_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
+    static struct dma_config spi1_dma_rx = SPI1_RX_DMA_CONFIG;
+    spi_config[SPI1_INDEX].dma_rx = &spi1_dma_rx;
+#endif
+#ifdef BSP_SPI1_TX_USING_DMA
+    spi_bus_obj[SPI1_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
+    static struct dma_config spi1_dma_tx = SPI1_TX_DMA_CONFIG;
+    spi_config[SPI1_INDEX].dma_tx = &spi1_dma_tx;
+#endif
+
+#ifdef BSP_SPI2_RX_USING_DMA
+    spi_bus_obj[SPI2_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
+    static struct dma_config spi2_dma_rx = SPI2_RX_DMA_CONFIG;
+    spi_config[SPI2_INDEX].dma_rx = &spi2_dma_rx;
+#endif
+#ifdef BSP_SPI2_TX_USING_DMA
+    spi_bus_obj[SPI2_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
+    static struct dma_config spi2_dma_tx = SPI2_TX_DMA_CONFIG;
+    spi_config[SPI2_INDEX].dma_tx = &spi2_dma_tx;
+#endif
+
+#ifdef BSP_SPI3_RX_USING_DMA
+    spi_bus_obj[SPI3_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
+    static struct dma_config spi3_dma_rx = SPI3_RX_DMA_CONFIG;
+    spi_config[SPI3_INDEX].dma_rx = &spi3_dma_rx;
+#endif
+#ifdef BSP_SPI3_TX_USING_DMA
+    spi_bus_obj[SPI3_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
+    static struct dma_config spi3_dma_tx = SPI3_TX_DMA_CONFIG;
+    spi_config[SPI3_INDEX].dma_tx = &spi3_dma_tx;
+#endif
+
+#ifdef BSP_SPI4_RX_USING_DMA
+    spi_bus_obj[SPI4_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
+    static struct dma_config spi4_dma_rx = SPI4_RX_DMA_CONFIG;
+    spi_config[SPI4_INDEX].dma_rx = &spi4_dma_rx;
+#endif
+#ifdef BSP_SPI4_TX_USING_DMA
+    spi_bus_obj[SPI4_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
+    static struct dma_config spi4_dma_tx = SPI4_TX_DMA_CONFIG;
+    spi_config[SPI4_INDEX].dma_tx = &spi4_dma_tx;
+#endif
+
+#ifdef BSP_SPI5_RX_USING_DMA
+    spi_bus_obj[SPI5_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
+    static struct dma_config spi5_dma_rx = SPI5_RX_DMA_CONFIG;
+    spi_config[SPI5_INDEX].dma_rx = &spi5_dma_rx;
+#endif
+#ifdef BSP_SPI5_TX_USING_DMA
+    spi_bus_obj[SPI5_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
+    static struct dma_config spi5_dma_tx = SPI5_TX_DMA_CONFIG;
+    spi_config[SPI5_INDEX].dma_tx = &spi5_dma_tx;
+#endif
+
+#ifdef BSP_SPI6_RX_USING_DMA
+    spi_bus_obj[SPI6_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
+    static struct dma_config spi6_dma_rx = SPI6_RX_DMA_CONFIG;
+    spi_config[SPI6_INDEX].dma_rx = &spi6_dma_rx;
+#endif
+#ifdef BSP_SPI6_TX_USING_DMA
+    spi_bus_obj[SPI6_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
+    static struct dma_config spi6_dma_tx = SPI6_TX_DMA_CONFIG;
+    spi_config[SPI6_INDEX].dma_tx = &spi6_dma_tx;
+#endif
+}
+
+#if defined(SOC_SERIES_STM32F0)
+void SPI1_DMA_RX_TX_IRQHandler(void) 
+{
+#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_TX_USING_DMA)
+    SPI1_DMA_TX_IRQHandler();
+#endif
+    
+#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_RX_USING_DMA)
+    SPI1_DMA_RX_IRQHandler();
+#endif
+}
+
+void SPI2_DMA_RX_TX_IRQHandler(void) 
+{
+#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_TX_USING_DMA)
+    SPI2_DMA_TX_IRQHandler();
+#endif
+    
+#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_RX_USING_DMA)
+    SPI2_DMA_RX_IRQHandler();
+#endif
+}
+#endif  /* SOC_SERIES_STM32F0 */
+
+int rt_hw_spi_init(void)
+{
+    stm32_get_dma_info();
+    return rt_hw_spi_bus_init();
+}
+INIT_BOARD_EXPORT(rt_hw_spi_init);
+
+#endif /* BSP_USING_SPI1 || BSP_USING_SPI2 || BSP_USING_SPI3 || BSP_USING_SPI4 || BSP_USING_SPI5 */
+#endif /* RT_USING_SPI */

Application_SY2/drivers/drv_usbd.c

@@ -0,0 +1,277 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-04-10     ZYH          first version
+ * 2019-10-27     flybreak     Compatible with the HS
+ */
+
+#include <rtthread.h>
+#include "board.h"
+
+#ifdef BSP_USING_USBDEVICE
+
+#include <rtdevice.h>
+#include <string.h>
+#include <drv_config.h>
+
+static PCD_HandleTypeDef _stm_pcd;
+static struct udcd _stm_udc;
+static struct ep_id _ep_pool[] =
+{
+    {0x0,  USB_EP_ATTR_CONTROL,     USB_DIR_INOUT,  64, ID_ASSIGNED  },
+    {0x1,  USB_EP_ATTR_BULK,        USB_DIR_IN,     64, ID_UNASSIGNED},
+    {0x1,  USB_EP_ATTR_BULK,        USB_DIR_OUT,    64, ID_UNASSIGNED},
+    {0x2,  USB_EP_ATTR_INT,         USB_DIR_IN,     64, ID_UNASSIGNED},
+    {0x2,  USB_EP_ATTR_INT,         USB_DIR_OUT,    64, ID_UNASSIGNED},
+    {0x3,  USB_EP_ATTR_BULK,        USB_DIR_IN,     64, ID_UNASSIGNED},
+#if !defined(SOC_SERIES_STM32F1)
+    {0x3,  USB_EP_ATTR_BULK,        USB_DIR_OUT,    64, ID_UNASSIGNED},
+#endif
+    {0xFF, USB_EP_ATTR_TYPE_MASK,   USB_DIR_MASK,   0,  ID_ASSIGNED  },
+};
+
+void USBD_IRQ_HANDLER(void)
+{
+    rt_interrupt_enter();
+    HAL_PCD_IRQHandler(&_stm_pcd);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *pcd)
+{
+    /* open ep0 OUT and IN */
+    HAL_PCD_EP_Open(pcd, 0x00, 0x40, EP_TYPE_CTRL);
+    HAL_PCD_EP_Open(pcd, 0x80, 0x40, EP_TYPE_CTRL);
+    rt_usbd_reset_handler(&_stm_udc);
+}
+
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+{
+    rt_usbd_ep0_setup_handler(&_stm_udc, (struct urequest *)hpcd->Setup);
+}
+
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+{
+    if (epnum == 0)
+    {
+        rt_usbd_ep0_in_handler(&_stm_udc);
+    }
+    else
+    {
+        rt_usbd_ep_in_handler(&_stm_udc, 0x80 | epnum, hpcd->IN_ep[epnum].xfer_count);
+    }
+}
+
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+{
+    rt_usbd_connect_handler(&_stm_udc);
+}
+
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+{
+    rt_usbd_sof_handler(&_stm_udc);
+}
+
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+{
+    rt_usbd_disconnect_handler(&_stm_udc);
+}
+
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+{
+    if (epnum != 0)
+    {
+        rt_usbd_ep_out_handler(&_stm_udc, epnum, hpcd->OUT_ep[epnum].xfer_count);
+    }
+    else
+    {
+        rt_usbd_ep0_out_handler(&_stm_udc, hpcd->OUT_ep[0].xfer_count);
+    }
+}
+
+void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
+{
+    if (state == 1)
+    {
+#if defined(SOC_SERIES_STM32F1)
+    rt_pin_mode(BSP_USB_CONNECT_PIN,PIN_MODE_OUTPUT);
+    rt_pin_write(BSP_USB_CONNECT_PIN, BSP_USB_PULL_UP_STATUS);
+#endif
+    }
+    else
+    {
+#if defined(SOC_SERIES_STM32F1)
+    rt_pin_mode(BSP_USB_CONNECT_PIN,PIN_MODE_OUTPUT);
+    rt_pin_write(BSP_USB_CONNECT_PIN, !BSP_USB_PULL_UP_STATUS);
+#endif
+    }
+}
+
+static rt_err_t _ep_set_stall(rt_uint8_t address)
+{
+    HAL_PCD_EP_SetStall(&_stm_pcd, address);
+    return RT_EOK;
+}
+
+static rt_err_t _ep_clear_stall(rt_uint8_t address)
+{
+    HAL_PCD_EP_ClrStall(&_stm_pcd, address);
+    return RT_EOK;
+}
+
+static rt_err_t _set_address(rt_uint8_t address)
+{
+    HAL_PCD_SetAddress(&_stm_pcd, address);
+    return RT_EOK;
+}
+
+static rt_err_t _set_config(rt_uint8_t address)
+{
+    return RT_EOK;
+}
+
+static rt_err_t _ep_enable(uep_t ep)
+{
+    RT_ASSERT(ep != RT_NULL);
+    RT_ASSERT(ep->ep_desc != RT_NULL);
+    HAL_PCD_EP_Open(&_stm_pcd, ep->ep_desc->bEndpointAddress,
+                    ep->ep_desc->wMaxPacketSize, ep->ep_desc->bmAttributes);
+    return RT_EOK;
+}
+
+static rt_err_t _ep_disable(uep_t ep)
+{
+    RT_ASSERT(ep != RT_NULL);
+    RT_ASSERT(ep->ep_desc != RT_NULL);
+    HAL_PCD_EP_Close(&_stm_pcd, ep->ep_desc->bEndpointAddress);
+    return RT_EOK;
+}
+
+static rt_size_t _ep_read(rt_uint8_t address, void *buffer)
+{
+    rt_size_t size = 0;
+    RT_ASSERT(buffer != RT_NULL);
+    return size;
+}
+
+static rt_size_t _ep_read_prepare(rt_uint8_t address, void *buffer, rt_size_t size)
+{
+    HAL_PCD_EP_Receive(&_stm_pcd, address, buffer, size);
+    return size;
+}
+
+static rt_size_t _ep_write(rt_uint8_t address, void *buffer, rt_size_t size)
+{
+    HAL_PCD_EP_Transmit(&_stm_pcd, address, buffer, size);
+    return size;
+}
+
+static rt_err_t _ep0_send_status(void)
+{
+    HAL_PCD_EP_Transmit(&_stm_pcd, 0x00, NULL, 0);
+    return RT_EOK;
+}
+
+static rt_err_t _suspend(void)
+{
+    return RT_EOK;
+}
+
+static rt_err_t _wakeup(void)
+{
+    return RT_EOK;
+}
+
+static rt_err_t _init(rt_device_t device)
+{
+    PCD_HandleTypeDef *pcd;
+    /* Set LL Driver parameters */
+    pcd = (PCD_HandleTypeDef *)device->user_data;
+    pcd->Instance = USBD_INSTANCE;
+    memset(&pcd->Init, 0, sizeof pcd->Init);
+    pcd->Init.dev_endpoints = 8;
+    pcd->Init.speed = USBD_PCD_SPEED;
+    pcd->Init.ep0_mps = DEP0CTL_MPS_64;
+#if !defined(SOC_SERIES_STM32F1)
+    pcd->Init.phy_itface = USBD_PCD_PHY_MODULE;
+#endif
+    /* Initialize LL Driver */
+    HAL_PCD_Init(pcd);
+    /* USB interrupt Init */
+    HAL_NVIC_SetPriority(USBD_IRQ_TYPE, 2, 0);
+    HAL_NVIC_EnableIRQ(USBD_IRQ_TYPE);
+#if !defined(SOC_SERIES_STM32F1)
+    HAL_PCDEx_SetRxFiFo(pcd, 0x80);
+    HAL_PCDEx_SetTxFiFo(pcd, 0, 0x40);
+    HAL_PCDEx_SetTxFiFo(pcd, 1, 0x40);
+    HAL_PCDEx_SetTxFiFo(pcd, 2, 0x40);
+    HAL_PCDEx_SetTxFiFo(pcd, 3, 0x40);
+#else
+    HAL_PCDEx_PMAConfig(pcd, 0x00, PCD_SNG_BUF, 0x18);
+    HAL_PCDEx_PMAConfig(pcd, 0x80, PCD_SNG_BUF, 0x58);
+    HAL_PCDEx_PMAConfig(pcd, 0x81, PCD_SNG_BUF, 0x98);
+    HAL_PCDEx_PMAConfig(pcd, 0x01, PCD_SNG_BUF, 0x118);
+    HAL_PCDEx_PMAConfig(pcd, 0x82, PCD_SNG_BUF, 0xD8);
+    HAL_PCDEx_PMAConfig(pcd, 0x02, PCD_SNG_BUF, 0x158);
+    HAL_PCDEx_PMAConfig(pcd, 0x83, PCD_SNG_BUF, 0x198);
+#endif
+    HAL_PCD_Start(pcd);
+    return RT_EOK;
+}
+
+const static struct udcd_ops _udc_ops =
+{
+    _set_address,
+    _set_config,
+    _ep_set_stall,
+    _ep_clear_stall,
+    _ep_enable,
+    _ep_disable,
+    _ep_read_prepare,
+    _ep_read,
+    _ep_write,
+    _ep0_send_status,
+    _suspend,
+    _wakeup,
+};
+
+#ifdef RT_USING_DEVICE_OPS
+const static struct rt_device_ops _ops =
+{
+    _init,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+};
+#endif
+
+int stm_usbd_register(void)
+{
+    rt_memset((void *)&_stm_udc, 0, sizeof(struct udcd));
+    _stm_udc.parent.type = RT_Device_Class_USBDevice;
+#ifdef RT_USING_DEVICE_OPS
+    _stm_udc.parent.ops = &_ops;
+#else
+    _stm_udc.parent.init = _init;
+#endif
+    _stm_udc.parent.user_data = &_stm_pcd;
+    _stm_udc.ops = &_udc_ops;
+    /* Register endpoint infomation */
+    _stm_udc.ep_pool = _ep_pool;
+    _stm_udc.ep0.id = &_ep_pool[0];
+#ifdef BSP_USBD_SPEED_HS
+    _stm_udc.device_is_hs = RT_TRUE;
+#endif
+    rt_device_register((rt_device_t)&_stm_udc, "usbd", 0);
+    rt_usb_device_init();
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(stm_usbd_register);
+#endif

Application_SY2/drivers/drv_usbh.c

@@ -0,0 +1,254 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2017-10-30     ZYH            the first version
+ * 2019-12-19     tyustli           port to stm32 series
+ */
+#include "drv_usbh.h"
+#include "board.h"
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#ifdef BSP_USING_USBHOST
+
+static HCD_HandleTypeDef stm32_hhcd_fs;
+static struct rt_completion urb_completion;
+static volatile rt_bool_t connect_status = RT_FALSE;
+
+void OTG_FS_IRQHandler(void)
+{
+    rt_interrupt_enter();
+    HAL_HCD_IRQHandler(&stm32_hhcd_fs);
+    rt_interrupt_leave();
+}
+
+void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
+{
+    uhcd_t hcd = (uhcd_t)hhcd->pData;
+    if (!connect_status)
+    {
+        connect_status = RT_TRUE;
+        RT_DEBUG_LOG(RT_DEBUG_USB, ("usb connected\n"));
+        rt_usbh_root_hub_connect_handler(hcd, OTG_FS_PORT, RT_FALSE);
+    }
+}
+
+void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
+{
+    uhcd_t hcd = (uhcd_t)hhcd->pData;
+    if (connect_status)
+    {
+        connect_status = RT_FALSE;
+        RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnnect\n"));
+        rt_usbh_root_hub_disconnect_handler(hcd, OTG_FS_PORT);
+    }
+}
+
+void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum, HCD_URBStateTypeDef urb_state)
+{
+    rt_completion_done(&urb_completion);
+}
+
+static rt_err_t drv_reset_port(rt_uint8_t port)
+{
+    RT_DEBUG_LOG(RT_DEBUG_USB, ("reset port\n"));
+    HAL_HCD_ResetPort(&stm32_hhcd_fs);
+    return RT_EOK;
+}
+
+static int drv_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes, int timeouts)
+{
+    int timeout = timeouts;
+
+    while (1)
+    {
+        if (!connect_status)
+        {
+            return -1;
+        }
+        rt_completion_init(&urb_completion);
+        HAL_HCD_HC_SubmitRequest(&stm32_hhcd_fs,
+                                 pipe->pipe_index,
+                                 (pipe->ep.bEndpointAddress & 0x80) >> 7,
+                                 pipe->ep.bmAttributes,
+                                 token,
+                                 buffer,
+                                 nbytes,
+                                 0);
+        rt_completion_wait(&urb_completion, timeout);
+        rt_thread_mdelay(1);
+        if (HAL_HCD_HC_GetState(&stm32_hhcd_fs, pipe->pipe_index) == HC_NAK)
+        {
+            RT_DEBUG_LOG(RT_DEBUG_USB, ("nak\n"));
+            if (pipe->ep.bmAttributes == USB_EP_ATTR_INT)
+            {
+                rt_thread_delay((pipe->ep.bInterval * RT_TICK_PER_SECOND / 1000) > 0 ? (pipe->ep.bInterval * RT_TICK_PER_SECOND / 1000) : 1);
+            }
+            HAL_HCD_HC_Halt(&stm32_hhcd_fs, pipe->pipe_index);
+            HAL_HCD_HC_Init(&stm32_hhcd_fs,
+                            pipe->pipe_index,
+                            pipe->ep.bEndpointAddress,
+                            pipe->inst->address,
+                            USB_OTG_SPEED_FULL,
+                            pipe->ep.bmAttributes,
+                            pipe->ep.wMaxPacketSize);
+            continue;
+        }
+        else if (HAL_HCD_HC_GetState(&stm32_hhcd_fs, pipe->pipe_index) == HC_STALL)
+        {
+            RT_DEBUG_LOG(RT_DEBUG_USB, ("stall\n"));
+            pipe->status = UPIPE_STATUS_STALL;
+            if (pipe->callback != RT_NULL)
+            {
+                pipe->callback(pipe);
+            }
+            return -1;
+        }
+        else if (HAL_HCD_HC_GetState(&stm32_hhcd_fs, pipe->pipe_index) == URB_ERROR)
+        {
+            RT_DEBUG_LOG(RT_DEBUG_USB, ("error\n"));
+            pipe->status = UPIPE_STATUS_ERROR;
+            if (pipe->callback != RT_NULL)
+            {
+                pipe->callback(pipe);
+            }
+            return -1;
+        }
+        else if(URB_DONE == HAL_HCD_HC_GetURBState(&stm32_hhcd_fs, pipe->pipe_index))
+        {
+            RT_DEBUG_LOG(RT_DEBUG_USB, ("ok\n"));
+            pipe->status = UPIPE_STATUS_OK;
+            if (pipe->callback != RT_NULL)
+            {
+                pipe->callback(pipe);
+            }
+            size_t size = HAL_HCD_HC_GetXferCount(&stm32_hhcd_fs, pipe->pipe_index);
+            if (pipe->ep.bEndpointAddress & 0x80)
+            {
+                return size;
+            }
+            else if (pipe->ep.bEndpointAddress & 0x00)
+            {
+                return size;
+            }
+            return nbytes;
+        }
+
+        continue;
+    }
+}
+
+static rt_uint16_t pipe_index = 0;
+static rt_uint8_t  drv_get_free_pipe_index(void)
+{
+    rt_uint8_t idx;
+    for (idx = 1; idx < 16; idx++)
+    {
+        if (!(pipe_index & (0x01 << idx)))
+        {
+            pipe_index |= (0x01 << idx);
+            return idx;
+        }
+    }
+    return 0xff;
+}
+
+static void drv_free_pipe_index(rt_uint8_t index)
+{
+    pipe_index &= ~(0x01 << index);
+}
+
+static rt_err_t drv_open_pipe(upipe_t pipe)
+{
+    pipe->pipe_index = drv_get_free_pipe_index();
+    HAL_HCD_HC_Init(&stm32_hhcd_fs,
+                    pipe->pipe_index,
+                    pipe->ep.bEndpointAddress,
+                    pipe->inst->address,
+                    USB_OTG_SPEED_FULL,
+                    pipe->ep.bmAttributes,
+                    pipe->ep.wMaxPacketSize);
+    /* Set DATA0 PID token*/
+    if (stm32_hhcd_fs.hc[pipe->pipe_index].ep_is_in)
+    {
+        stm32_hhcd_fs.hc[pipe->pipe_index].toggle_in = 0;
+    }
+    else
+    {
+        stm32_hhcd_fs.hc[pipe->pipe_index].toggle_out = 0;
+    }
+    return RT_EOK;
+}
+
+static rt_err_t drv_close_pipe(upipe_t pipe)
+{
+    HAL_HCD_HC_Halt(&stm32_hhcd_fs, pipe->pipe_index);
+    drv_free_pipe_index(pipe->pipe_index);
+    return RT_EOK;
+}
+
+static struct uhcd_ops _uhcd_ops =
+{
+    drv_reset_port,
+    drv_pipe_xfer,
+    drv_open_pipe,
+    drv_close_pipe,
+};
+
+static rt_err_t stm32_hcd_init(rt_device_t device)
+{
+    HCD_HandleTypeDef *hhcd = (HCD_HandleTypeDef *)device->user_data;
+    hhcd->Instance = USB_OTG_FS;
+    hhcd->Init.Host_channels = 8;
+    hhcd->Init.speed = HCD_SPEED_FULL;
+    hhcd->Init.dma_enable = DISABLE;
+    hhcd->Init.phy_itface = HCD_PHY_EMBEDDED;
+    hhcd->Init.Sof_enable = DISABLE;
+    RT_ASSERT(HAL_HCD_Init(hhcd) == HAL_OK);
+    HAL_HCD_Start(hhcd);
+#ifdef USBH_USING_CONTROLLABLE_POWER
+    rt_pin_mode(USBH_POWER_PIN, PIN_MODE_OUTPUT);
+    rt_pin_write(USBH_POWER_PIN, PIN_LOW);
+#endif
+    return RT_EOK;
+}
+
+int stm_usbh_register(void)
+{
+    rt_err_t res = -RT_ERROR;
+
+    uhcd_t uhcd = (uhcd_t)rt_malloc(sizeof(struct uhcd));
+    if (uhcd == RT_NULL)
+    {
+        rt_kprintf("uhcd malloc failed\r\n");
+        return -RT_ERROR;
+    }
+
+    rt_memset((void *)uhcd, 0, sizeof(struct uhcd));
+
+    uhcd->parent.type = RT_Device_Class_USBHost;
+    uhcd->parent.init = stm32_hcd_init;
+    uhcd->parent.user_data = &stm32_hhcd_fs;
+
+    uhcd->ops = &_uhcd_ops;
+    uhcd->num_ports = OTG_FS_PORT;
+    stm32_hhcd_fs.pData = uhcd;
+
+    res = rt_device_register(&uhcd->parent, "usbh", RT_DEVICE_FLAG_DEACTIVATE);
+    if (res != RT_EOK)
+    {
+        rt_kprintf("register usb host failed res = %d\r\n", res);
+        return -RT_ERROR;
+    }
+
+    rt_usb_host_init();
+
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(stm_usbh_register);
+
+#endif

Application_SY2/drivers/drv_wdt.c

@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2018-12-07     balanceTWK        first version
+ */
+
+#include <board.h>
+#include<rtthread.h>
+#include<rtdevice.h>
+
+#ifdef RT_USING_WDT
+
+//#define DRV_DEBUG
+#define LOG_TAG             "drv.wdt"
+#include <drv_log.h>
+
+struct stm32_wdt_obj
+{
+    IWDG_HandleTypeDef hiwdg;
+    rt_uint16_t is_start;
+};
+static struct stm32_wdt_obj stm32_wdt;
+static struct rt_watchdog_ops ops;
+static rt_watchdog_t watchdog;
+
+static rt_err_t wdt_init(rt_watchdog_t *wdt)
+{
+    return RT_EOK;
+}
+
+static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
+{
+    switch (cmd)
+    {
+        /* feed the watchdog */
+    case RT_DEVICE_CTRL_WDT_KEEPALIVE:
+        if(HAL_IWDG_Refresh(&stm32_wdt.hiwdg) != HAL_OK)
+        {
+            LOG_E("watch dog keepalive fail.");
+        }
+        break;
+        /* set watchdog timeout */
+    case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
+#if defined(LSI_VALUE)
+        if(LSI_VALUE)
+        {
+            stm32_wdt.hiwdg.Init.Reload = (*((rt_uint32_t*)arg)) * LSI_VALUE / 256 ;
+        }
+        else
+        {
+            LOG_E("Please define the value of LSI_VALUE!");
+        }
+        if(stm32_wdt.hiwdg.Init.Reload > 0xFFF)
+        {
+            LOG_E("wdg set timeout parameter too large, please less than %ds",0xFFF * 256 / LSI_VALUE);
+            return -RT_EINVAL;
+        }
+#else
+  #error "Please define the value of LSI_VALUE!"
+#endif
+        if(stm32_wdt.is_start)
+        {
+            if (HAL_IWDG_Init(&stm32_wdt.hiwdg) != HAL_OK)
+            {
+                LOG_E("wdg set timeout failed.");
+                return -RT_ERROR;
+            }
+        }
+        break;
+    case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
+#if defined(LSI_VALUE)
+        if(LSI_VALUE)
+        {
+            (*((rt_uint32_t*)arg)) = stm32_wdt.hiwdg.Init.Reload * 256 / LSI_VALUE;
+        }
+        else
+        {
+            LOG_E("Please define the value of LSI_VALUE!");
+        }
+#else
+  #error "Please define the value of LSI_VALUE!"
+#endif
+        break;
+    case RT_DEVICE_CTRL_WDT_START:
+        if (HAL_IWDG_Init(&stm32_wdt.hiwdg) != HAL_OK)
+        {
+            LOG_E("wdt start failed.");
+            return -RT_ERROR;
+        }
+        stm32_wdt.is_start = 1;
+        break;
+    default:
+        LOG_W("This command is not supported.");
+        return -RT_ERROR;
+    }
+    return RT_EOK;
+}
+
+int rt_wdt_init(void)
+{
+#if defined(SOC_SERIES_STM32H7)
+    stm32_wdt.hiwdg.Instance = IWDG1;
+#else
+    stm32_wdt.hiwdg.Instance = IWDG;
+#endif
+    stm32_wdt.hiwdg.Init.Prescaler = IWDG_PRESCALER_256;
+
+    stm32_wdt.hiwdg.Init.Reload = 0x00000FFF;
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) \
+    || defined(SOC_SERIES_STM32H7)
+    stm32_wdt.hiwdg.Init.Window = 0x00000FFF;
+#endif
+    stm32_wdt.is_start = 0;
+
+    ops.init = &wdt_init;
+    ops.control = &wdt_control;
+    watchdog.ops = &ops;
+    /* register watchdog device */
+    if (rt_hw_watchdog_register(&watchdog, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK)
+    {
+        LOG_E("wdt device register failed.");
+        return -RT_ERROR;
+    }
+    LOG_D("wdt device register success.");
+    return RT_EOK;
+}
+INIT_BOARD_EXPORT(rt_wdt_init);
+
+#endif /* RT_USING_WDT */

Application_SY2/drivers/fal_cfg.h

@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-05-17     armink       the first version
+ */
+
+#ifndef _FAL_CFG_H_
+#define _FAL_CFG_H_
+
+#include <rtconfig.h>
+#include <board.h>
+
+#define NOR_FLASH_DEV_NAME             "norflash0"
+
+/* ===================== Flash device Configuration ========================= */
+
+extern struct fal_flash_dev nor_flash0;
+extern const struct fal_flash_dev stm32f1_onchip_flash;
+/* flash device table */
+#define FAL_FLASH_DEV_TABLE                                          \
+{                                                                    \
+    &stm32f1_onchip_flash,                                           \
+    &nor_flash0,                                                     \
+}
+/* ====================== Partition Configuration ========================== */
+#ifdef FAL_PART_HAS_TABLE_CFG
+/* partition table */
+//分区表:FAL_PART_MAGIC_WORD,分区名，flash设备名字,起始地址,空间大小,保留0
+/*
+#define FAL_PART_TABLE                                                               \
+{                                                                                    \
+    {FAL_PART_MAGIC_WORD,        "bl",    "onchip_flash",                           0,                        200*1024,       0}, \
+    {FAL_PART_MAGIC_WORD,        "app",   "onchip_flash",                           200*1024,                 312*1024,       0}, \
+    {FAL_PART_MAGIC_WORD,  "easyflash",   FAL_USING_NOR_FLASH_DEV_NAME,             0,                        15*1024*1024,      0}, \
+    {FAL_PART_MAGIC_WORD,  "fm_area",     FAL_USING_NOR_FLASH_DEV_NAME,             15*1024*1024,             512*1024,       0}, \
+    {FAL_PART_MAGIC_WORD,  "df_area",     FAL_USING_NOR_FLASH_DEV_NAME,             15*1024*1024 + 512*1024,  512*1024,       0}, \
+}
+*/
+#define FAL_PART_TABLE                                                               \
+{                                                                                    \
+    {FAL_PART_MAGIC_WORD,        "bl",     "onchip_flash",                           0,                       200*1024,       0}, \
+    {FAL_PART_MAGIC_WORD,        "app",     "onchip_flash",                          200*1024,                312*1024,       0}, \
+    {FAL_PART_MAGIC_WORD, "easyflash",     FAL_USING_NOR_FLASH_DEV_NAME,             0,                       3*1024*1024,   0}, \
+    {FAL_PART_MAGIC_WORD,  "fm_area",     FAL_USING_NOR_FLASH_DEV_NAME,             3*1024*1024,             512*1024,      0}, \
+    {FAL_PART_MAGIC_WORD,  "df_area",     FAL_USING_NOR_FLASH_DEV_NAME,             3*1024*1024 + 512*1024,  512*1024,      0}, \
+}
+#endif /* FAL_PART_HAS_TABLE_CFG */
+
+#endif /* _FAL_CFG_H_ */

Application_SY2/drivers/include/config/adc_config.h

@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-07     zylx         first version
+ */
+
+#ifndef __ADC_CONFIG_H__
+#define __ADC_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef BSP_USING_ADC1
+#ifndef ADC1_CONFIG
+#define ADC1_CONFIG                                                \
+    {                                                              \
+       .Instance                   = ADC1,                         \
+       .Init.DataAlign             = ADC_DATAALIGN_RIGHT,          \
+       .Init.ScanConvMode          = ADC_SCAN_DISABLE,             \
+       .Init.ContinuousConvMode    = DISABLE,                      \
+       .Init.NbrOfConversion       = 1,                            \
+       .Init.DiscontinuousConvMode = DISABLE,                      \
+       .Init.NbrOfDiscConversion   = 1,                            \
+       .Init.ExternalTrigConv      = ADC_SOFTWARE_START,           \
+    }  
+#endif /* ADC1_CONFIG */
+#endif /* BSP_USING_ADC1 */
+
+#ifdef BSP_USING_ADC2
+#ifndef ADC2_CONFIG
+#define ADC2_CONFIG                                                \
+    {                                                              \
+       .Instance                   = ADC2,                         \
+       .Init.DataAlign             = ADC_DATAALIGN_RIGHT,          \
+       .Init.ScanConvMode          = ADC_SCAN_DISABLE,             \
+       .Init.ContinuousConvMode    = DISABLE,                      \
+       .Init.NbrOfConversion       = 1,                            \
+       .Init.DiscontinuousConvMode = DISABLE,                      \
+       .Init.NbrOfDiscConversion   = 1,                            \
+       .Init.ExternalTrigConv      = ADC_SOFTWARE_START,           \
+    }  
+#endif /* ADC2_CONFIG */
+#endif /* BSP_USING_ADC2 */
+
+#ifdef BSP_USING_ADC3
+#ifndef ADC3_CONFIG
+#define ADC3_CONFIG                                                \
+    {                                                              \
+       .Instance                   = ADC3,                         \
+       .Init.DataAlign             = ADC_DATAALIGN_RIGHT,          \
+       .Init.ScanConvMode          = ADC_SCAN_DISABLE,             \
+       .Init.ContinuousConvMode    = DISABLE,                      \
+       .Init.NbrOfConversion       = 1,                            \
+       .Init.DiscontinuousConvMode = DISABLE,                      \
+       .Init.NbrOfDiscConversion   = 1,                            \
+       .Init.ExternalTrigConv      = ADC_SOFTWARE_START,           \
+    }  
+#endif /* ADC3_CONFIG */
+#endif /* BSP_USING_ADC3 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ADC_CONFIG_H__ */

Application_SY2/drivers/include/config/dma_config.h

@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-01-02     SummerGift   first version
+ * 2019-01-08     SummerGift   clean up the code
+ */
+
+#ifndef __DMA_CONFIG_H__
+#define __DMA_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DMA1 channel1 */
+/* DMA1 channel2 */
+#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
+#define SPI1_DMA_RX_IRQHandler          DMA1_Channel2_IRQHandler
+#define SPI1_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define SPI1_RX_DMA_INSTANCE            DMA1_Channel2
+#define SPI1_RX_DMA_IRQ                 DMA1_Channel2_IRQn
+#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_INSTANCE)
+#define UART3_DMA_TX_IRQHandler         DMA1_Channel2_IRQHandler
+#define UART3_TX_DMA_RCC                RCC_AHBENR_DMA1EN
+#define UART3_TX_DMA_INSTANCE           DMA1_Channel2
+#define UART3_TX_DMA_IRQ                DMA1_Channel2_IRQn
+#endif
+
+/* DMA1 channel3 */
+#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
+#define SPI1_DMA_TX_IRQHandler          DMA1_Channel3_IRQHandler
+#define SPI1_TX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define SPI1_TX_DMA_INSTANCE            DMA1_Channel3
+#define SPI1_TX_DMA_IRQ                 DMA1_Channel3_IRQn
+#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
+#define UART3_DMA_RX_IRQHandler         DMA1_Channel3_IRQHandler
+#define UART3_RX_DMA_RCC                RCC_AHBENR_DMA1EN
+#define UART3_RX_DMA_INSTANCE           DMA1_Channel3
+#define UART3_RX_DMA_IRQ                DMA1_Channel3_IRQn
+#endif
+
+/* DMA1 channel4 */
+#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
+#define SPI2_DMA_RX_IRQHandler          DMA1_Channel4_IRQHandler
+#define SPI2_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define SPI2_RX_DMA_INSTANCE            DMA1_Channel4
+#define SPI2_RX_DMA_IRQ                 DMA1_Channel4_IRQn
+#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE)
+#define UART1_DMA_TX_IRQHandler         DMA1_Channel4_IRQHandler
+#define UART1_TX_DMA_RCC                RCC_AHBENR_DMA1EN
+#define UART1_TX_DMA_INSTANCE           DMA1_Channel4
+#define UART1_TX_DMA_IRQ                DMA1_Channel4_IRQn
+#endif
+
+/* DMA1 channel5 */
+#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
+#define SPI2_DMA_TX_IRQHandler          DMA1_Channel5_IRQHandler
+#define SPI2_TX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define SPI2_TX_DMA_INSTANCE            DMA1_Channel5
+#define SPI2_TX_DMA_IRQ                 DMA1_Channel5_IRQn
+
+#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
+#define UART1_DMA_RX_IRQHandler         DMA1_Channel5_IRQHandler
+#define UART1_RX_DMA_RCC                RCC_AHBENR_DMA1EN
+#define UART1_RX_DMA_INSTANCE           DMA1_Channel5
+#define UART1_RX_DMA_IRQ                DMA1_Channel5_IRQn
+#endif
+
+/* DMA1 channel6 */
+#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
+#define UART2_DMA_RX_IRQHandler         DMA1_Channel6_IRQHandler
+#define UART2_RX_DMA_RCC                RCC_AHBENR_DMA1EN
+#define UART2_RX_DMA_INSTANCE           DMA1_Channel6
+#define UART2_RX_DMA_IRQ                DMA1_Channel6_IRQn
+#endif
+
+/* DMA1 channel7 */
+#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_INSTANCE)
+#define UART2_DMA_TX_IRQHandler         DMA1_Channel7_IRQHandler
+#define UART2_TX_DMA_RCC                RCC_AHBENR_DMA1EN
+#define UART2_TX_DMA_INSTANCE           DMA1_Channel7
+#define UART2_TX_DMA_IRQ                DMA1_Channel7_IRQn
+#endif
+
+/* DMA2 channel1 */
+#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
+#define SPI3_DMA_RX_IRQHandler          DMA2_Channel1_IRQHandler
+#define SPI3_RX_DMA_RCC                 RCC_AHBENR_DMA2EN
+#define SPI3_RX_DMA_INSTANCE            DMA2_Channel1
+#define SPI3_RX_DMA_IRQ                 DMA2_Channel1_IRQn
+#endif
+
+/* DMA2 channel2 */
+#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_INSTANCE)
+#define SPI3_DMA_TX_IRQHandler          DMA2_Channel2_IRQHandler
+#define SPI3_TX_DMA_RCC                 RCC_AHBENR_DMA2EN
+#define SPI3_TX_DMA_INSTANCE            DMA2_Channel2
+#define SPI3_TX_DMA_IRQ                 DMA2_Channel2_IRQn
+#endif
+
+/* DMA2 channel3 */
+#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE)
+#define UART4_DMA_RX_IRQHandler         DMA2_Channel3_IRQHandler
+#define UART4_RX_DMA_RCC                RCC_AHBENR_DMA2EN
+#define UART4_RX_DMA_INSTANCE           DMA2_Channel3
+#define UART4_RX_DMA_IRQ                DMA2_Channel3_IRQn
+#endif
+/* DMA2 channel4 */
+/* DMA2 channel5 */
+#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
+#define UART4_DMA_TX_IRQHandler         DMA2_Channel4_5_IRQHandler
+#define UART4_TX_DMA_RCC                RCC_AHBENR_DMA2EN
+#define UART4_TX_DMA_INSTANCE           DMA2_Channel5
+#define UART4_TX_DMA_IRQ                DMA2_Channel4_5_IRQn
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DMA_CONFIG_H__ */

Application_SY2/drivers/include/config/pulse_encoder_config.h

@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-08-23     balanceTWK   first version
+ */
+
+#ifndef __PULSE_ENCODER_CONFIG_H__
+#define __PULSE_ENCODER_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef BSP_USING_PULSE_ENCODER1
+#ifndef PULSE_ENCODER1_CONFIG
+#define PULSE_ENCODER1_CONFIG                     \
+    {                                             \
+       .tim_handler.Instance     = TIM1,          \
+       .encoder_irqn             = TIM1_UP_IRQn,  \
+       .name                     = "pulse1"       \
+    }
+#endif /* PULSE_ENCODER1_CONFIG */
+#endif /* BSP_USING_PULSE_ENCODER1 */
+
+#ifdef BSP_USING_PULSE_ENCODER2
+#ifndef PULSE_ENCODER2_CONFIG
+#define PULSE_ENCODER2_CONFIG                  \
+    {                                          \
+       .tim_handler.Instance     = TIM2,       \
+       .encoder_irqn             = TIM2_IRQn,  \
+       .name                     = "pulse2"    \
+    }
+#endif /* PULSE_ENCODER2_CONFIG */
+#endif /* BSP_USING_PULSE_ENCODER2 */
+
+#ifdef BSP_USING_PULSE_ENCODER3
+#ifndef PULSE_ENCODER3_CONFIG
+#define PULSE_ENCODER3_CONFIG                  \
+    {                                          \
+       .tim_handler.Instance     = TIM3,       \
+       .encoder_irqn             = TIM3_IRQn,  \
+       .name                     = "pulse3"    \
+    }
+#endif /* PULSE_ENCODER3_CONFIG */
+#endif /* BSP_USING_PULSE_ENCODER3 */
+
+#ifdef BSP_USING_PULSE_ENCODER4
+#ifndef PULSE_ENCODER4_CONFIG
+#define PULSE_ENCODER4_CONFIG                  \
+    {                                          \
+       .tim_handler.Instance     = TIM4,       \
+       .encoder_irqn             = TIM4_IRQn,  \
+       .name                     = "pulse4"    \
+    }
+#endif /* PULSE_ENCODER4_CONFIG */
+#endif /* BSP_USING_PULSE_ENCODER4 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PULSE_ENCODER_CONFIG_H__ */

Application_SY2/drivers/include/config/pwm_config.h

@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-13     zylx         first version
+ */
+
+#ifndef __PWM_CONFIG_H__
+#define __PWM_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef BSP_USING_PWM2
+#ifndef PWM2_CONFIG
+#define PWM2_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM2,         \
+       .name                    = "pwm2",       \
+       .channel                 = 0             \
+    }
+#endif /* PWM2_CONFIG */
+#endif /* BSP_USING_PWM2 */
+
+#ifdef BSP_USING_PWM3
+#ifndef PWM3_CONFIG
+#define PWM3_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM3,         \
+       .name                    = "pwm3",       \
+       .channel                 = 0             \
+    }
+#endif /* PWM3_CONFIG */
+#endif /* BSP_USING_PWM3 */
+
+#ifdef BSP_USING_PWM4
+#ifndef PWM4_CONFIG
+#define PWM4_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM4,         \
+       .name                    = "pwm4",       \
+       .channel                 = 0             \
+    }
+#endif /* PWM4_CONFIG */
+#endif /* BSP_USING_PWM4 */
+
+#ifdef BSP_USING_PWM5
+#ifndef PWM5_CONFIG
+#define PWM5_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM5,         \
+       .name                    = "pwm5",       \
+       .channel                 = 0             \
+    }
+#endif /* PWM5_CONFIG */
+#endif /* BSP_USING_PWM5 */
+
+#ifdef BSP_USING_PWM8
+#ifndef PWM8_CONFIG
+#define PWM8_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM8,         \
+       .name                    = "pwm8",       \
+       .channel                 = 0             \
+    }
+#endif /* PWM3_CONFIG */
+#endif /* BSP_USING_PWM3 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PWM_CONFIG_H__ */

Application_SY2/drivers/include/config/sdio_config.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-13     BalanceTWK   first version
+ */
+
+#ifndef __SDIO_CONFIG_H__
+#define __SDIO_CONFIG_H__
+
+#include <rtthread.h>
+#include "stm32f1xx_hal.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef BSP_USING_SDIO
+#define SDIO_BUS_CONFIG                                  \
+    {                                                    \
+        .Instance = SDIO,                                \
+        .dma_rx.dma_rcc = RCC_AHBENR_DMA2EN,             \
+        .dma_tx.dma_rcc = RCC_AHBENR_DMA2EN,             \
+        .dma_rx.Instance = DMA2_Channel4,                \
+        .dma_rx.dma_irq = DMA2_Channel4_IRQn,            \
+        .dma_tx.Instance = DMA2_Channel4,                \
+        .dma_tx.dma_irq = DMA2_Channel4_IRQn,            \
+    }
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SDIO_CONFIG_H__ */
+
+
+

Application_SY2/drivers/include/config/spi_config.h

@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ * 2019-01-05     SummerGift   modify DMA support
+ */
+
+#ifndef __SPI_CONFIG_H__
+#define __SPI_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef BSP_USING_SPI1
+#ifndef SPI1_BUS_CONFIG
+#define SPI1_BUS_CONFIG                             \
+    {                                               \
+        .Instance = SPI1,                           \
+        .bus_name = "spi1",                         \
+    }
+#endif /* SPI1_BUS_CONFIG */
+#endif /* BSP_USING_SPI1 */
+    
+#ifdef BSP_SPI1_TX_USING_DMA
+#ifndef SPI1_TX_DMA_CONFIG
+#define SPI1_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_rcc = SPI1_TX_DMA_RCC,                 \
+        .Instance = SPI1_TX_DMA_INSTANCE,           \
+        .dma_irq = SPI1_TX_DMA_IRQ,                 \
+    }
+#endif /* SPI1_TX_DMA_CONFIG */
+#endif /* BSP_SPI1_TX_USING_DMA */
+
+#ifdef BSP_SPI1_RX_USING_DMA
+#ifndef SPI1_RX_DMA_CONFIG
+#define SPI1_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_rcc = SPI1_RX_DMA_RCC,                 \
+        .Instance = SPI1_RX_DMA_INSTANCE,           \
+        .dma_irq = SPI1_RX_DMA_IRQ,                 \
+    }
+#endif /* SPI1_RX_DMA_CONFIG */
+#endif /* BSP_SPI1_RX_USING_DMA */
+
+#ifdef BSP_USING_SPI2
+#ifndef SPI2_BUS_CONFIG
+#define SPI2_BUS_CONFIG                             \
+    {                                               \
+        .Instance = SPI2,                           \
+        .bus_name = "spi2",                         \
+    }
+#endif /* SPI2_BUS_CONFIG */
+#endif /* BSP_USING_SPI2 */
+    
+#ifdef BSP_SPI2_TX_USING_DMA
+#ifndef SPI2_TX_DMA_CONFIG
+#define SPI2_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_rcc  = SPI2_TX_DMA_RCC,                \
+        .Instance = SPI2_TX_DMA_INSTANCE,           \
+        .dma_irq  = SPI2_TX_DMA_IRQ,                \
+    }
+#endif /* SPI2_TX_DMA_CONFIG */
+#endif /* BSP_SPI2_TX_USING_DMA */
+
+#ifdef BSP_SPI2_RX_USING_DMA
+#ifndef SPI2_RX_DMA_CONFIG
+#define SPI2_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_rcc  = SPI2_RX_DMA_RCC,                \
+        .Instance = SPI2_RX_DMA_INSTANCE,           \
+        .dma_irq  = SPI2_RX_DMA_IRQ,                \
+    }
+#endif /* SPI2_RX_DMA_CONFIG */
+#endif /* BSP_SPI2_RX_USING_DMA */
+
+#ifdef BSP_USING_SPI3
+#ifndef SPI3_BUS_CONFIG
+#define SPI3_BUS_CONFIG                             \
+    {                                               \
+        .Instance = SPI3,                           \
+        .bus_name = "spi3",                         \
+    }
+#endif /* SPI3_BUS_CONFIG */
+#endif /* BSP_USING_SPI3 */
+    
+#ifdef BSP_SPI3_TX_USING_DMA
+#ifndef SPI3_TX_DMA_CONFIG
+#define SPI3_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_rcc  = SPI3_TX_DMA_RCC,                \
+        .Instance = SPI3_TX_DMA_INSTANCE,           \
+        .dma_irq  = SPI3_TX_DMA_IRQ,                \
+    }
+#endif /* SPI3_TX_DMA_CONFIG */
+#endif /* BSP_SPI3_TX_USING_DMA */
+
+#ifdef BSP_SPI3_RX_USING_DMA
+#ifndef SPI3_RX_DMA_CONFIG
+#define SPI3_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_rcc  = SPI3_RX_DMA_RCC,                \
+        .Instance = SPI3_RX_DMA_INSTANCE,           \
+        .dma_irq  = SPI3_RX_DMA_IRQ,                \
+    }
+#endif /* SPI3_RX_DMA_CONFIG */
+#endif /* BSP_SPI3_RX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SPI_CONFIG_H__ */
+
+
+

Application_SY2/drivers/include/config/tim_config.h

@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-11     zylx         first version
+ */
+
+#ifndef __TIM_CONFIG_H__
+#define __TIM_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef TIM_DEV_INFO_CONFIG
+#define TIM_DEV_INFO_CONFIG                     \
+    {                                           \
+        .maxfreq = 1000000,                     \
+        .minfreq = 2000,                        \
+        .maxcnt  = 0xFFFF,                      \
+        .cntmode = HWTIMER_CNTMODE_UP,          \
+    }
+#endif /* TIM_DEV_INFO_CONFIG */
+
+#ifdef BSP_USING_TIM2
+#ifndef TIM2_CONFIG
+#define TIM2_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM2,         \
+       .tim_irqn                = TIM2_IRQn,    \
+       .name                    = "timer2",     \
+    }
+#endif /* TIM2_CONFIG */
+#endif /* BSP_USING_TIM2 */
+
+#ifdef BSP_USING_TIM3
+#ifndef TIM3_CONFIG
+#define TIM3_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM3,         \
+       .tim_irqn                = TIM3_IRQn,    \
+       .name                    = "timer3",     \
+    }
+#endif /* TIM3_CONFIG */
+#endif /* BSP_USING_TIM3 */
+
+#ifdef BSP_USING_TIM4
+#ifndef TIM4_CONFIG
+#define TIM4_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM4,         \
+       .tim_irqn                = TIM4_IRQn,    \
+       .name                    = "timer4",     \
+    }
+#endif /* TIM4_CONFIG */
+#endif /* BSP_USING_TIM4 */
+
+#ifdef BSP_USING_TIM5
+#ifndef TIM5_CONFIG
+#define TIM5_CONFIG                             \
+    {                                           \
+       .tim_handle.Instance     = TIM5,         \
+       .tim_irqn                = TIM5_IRQn,    \
+       .name                    = "timer5",     \
+    }
+#endif /* TIM5_CONFIG */
+#endif /* BSP_USING_TIM5 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TIM_CONFIG_H__ */

Application_SY2/drivers/include/config/uart_config.h

@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-10-30     BalanceTWK   first version
+ * 2019-01-05     SummerGift   modify DMA support
+ */
+
+#ifndef __UART_CONFIG_H__
+#define __UART_CONFIG_H__
+
+#include <rtthread.h>
+#include <board.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(BSP_USING_UART1)
+#ifndef UART1_CONFIG
+#define UART1_CONFIG                                                \
+    {                                                               \
+        .name = "uart1",                                            \
+        .Instance = USART1,                                         \
+        .irq_type = USART1_IRQn,                                    \
+        .tx_port  = UART1_TX_PORT,                                  \
+        .rx_port  = UART1_RX_PORT,                                  \
+        .tx_pin   = UART1_TX_PIN,                                   \
+        .rx_pin   = UART1_RX_PIN,                                   \
+    }
+#endif /* UART1_CONFIG */
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_DMA_RX_CONFIG
+#define UART1_DMA_RX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART1_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART1_RX_DMA_RCC,                               \
+        .dma_irq  = UART1_RX_DMA_IRQ,                               \
+    }
+#endif /* UART1_DMA_RX_CONFIG */
+#endif /* BSP_UART1_RX_USING_DMA */
+
+#if defined(BSP_UART1_TX_USING_DMA)
+#ifndef UART1_DMA_TX_CONFIG
+#define UART1_DMA_TX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART1_TX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART1_TX_DMA_RCC,                               \
+        .dma_irq  = UART1_TX_DMA_IRQ,                               \
+    }
+#endif /* UART1_DMA_TX_CONFIG */
+#endif /* BSP_UART1_TX_USING_DMA */
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_USING_UART2)
+#ifndef UART2_CONFIG
+#define UART2_CONFIG                                                \
+    {                                                               \
+        .name = "uart2",                                            \
+        .Instance = USART2,                                         \
+        .irq_type = USART2_IRQn,                                    \
+        .tx_port  = UART2_TX_PORT,                                  \
+        .rx_port  = UART2_RX_PORT,                                  \
+        .tx_pin   = UART2_TX_PIN,                                   \
+        .rx_pin   = UART2_RX_PIN,                                   \
+    }
+#endif /* UART2_CONFIG */
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_DMA_RX_CONFIG
+#define UART2_DMA_RX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART2_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART2_RX_DMA_RCC,                               \
+        .dma_irq  = UART2_RX_DMA_IRQ,                               \
+    }
+#endif /* UART2_DMA_RX_CONFIG */
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#if defined(BSP_UART2_TX_USING_DMA)
+#ifndef UART2_DMA_TX_CONFIG
+#define UART2_DMA_TX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART2_TX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART2_TX_DMA_RCC,                               \
+        .dma_irq  = UART2_TX_DMA_IRQ,                               \
+    }
+#endif /* UART2_DMA_TX_CONFIG */
+#endif /* BSP_UART2_TX_USING_DMA */
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_USING_UART3)
+#ifndef UART3_CONFIG
+#define UART3_CONFIG                                                \
+    {                                                               \
+        .name = "uart3",                                            \
+        .Instance = USART3,                                         \
+        .irq_type = USART3_IRQn,                                    \
+        .tx_port  = UART3_TX_PORT,                                  \
+        .rx_port  = UART3_RX_PORT,                                  \
+        .tx_pin   = UART3_TX_PIN,                                   \
+        .rx_pin   = UART3_RX_PIN,                                   \
+    }
+#endif /* UART3_CONFIG */
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_DMA_RX_CONFIG
+#define UART3_DMA_RX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART3_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART3_RX_DMA_RCC,                               \
+        .dma_irq  = UART3_RX_DMA_IRQ,                               \
+    }
+#endif /* UART3_DMA_RX_CONFIG */
+#endif /* BSP_UART3_RX_USING_DMA */
+
+#if defined(BSP_UART3_TX_USING_DMA)
+#ifndef UART3_DMA_TX_CONFIG
+#define UART3_DMA_TX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART3_TX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART3_TX_DMA_RCC,                               \
+        .dma_irq  = UART3_TX_DMA_IRQ,                               \
+    }
+#endif /* UART3_DMA_TX_CONFIG */
+#endif /* BSP_UART3_TX_USING_DMA */
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_USING_UART4)
+#ifndef UART4_CONFIG
+#define UART4_CONFIG                                                \
+    {                                                               \
+        .name = "uart4",                                            \
+        .Instance = UART4,                                          \
+        .irq_type = UART4_IRQn,                                     \
+        .tx_port  = UART4_TX_PORT,                                  \
+        .rx_port  = UART4_RX_PORT,                                  \
+        .tx_pin   = UART4_TX_PIN,                                   \
+        .rx_pin   = UART4_RX_PIN,                                   \
+    }
+#endif /* UART4_CONFIG */
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_DMA_RX_CONFIG
+#define UART4_DMA_RX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART4_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART4_RX_DMA_RCC,                               \
+        .dma_irq  = UART4_RX_DMA_IRQ,                               \
+    }
+#endif /* UART4_DMA_RX_CONFIG */
+#endif /* BSP_UART4_RX_USING_DMA */
+
+#if defined(BSP_UART4_TX_USING_DMA)
+#ifndef UART4_DMA_TX_CONFIG
+#define UART4_DMA_TX_CONFIG                                         \
+    {                                                               \
+        .Instance = UART4_TX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART4_TX_DMA_RCC,                               \
+        .dma_irq  = UART4_TX_DMA_IRQ,                               \
+    }
+#endif /* UART4_DMA_TX_CONFIG */
+#endif /* BSP_UART4_TX_USING_DMA */
+#endif /* BSP_USING_UART4 */
+
+#if defined(BSP_USING_UART5)
+#ifndef UART5_CONFIG
+#define UART5_CONFIG                                                \
+    {                                                               \
+        .name = "uart5",                                            \
+        .Instance = UART5,                                          \
+        .irq_type = UART5_IRQn,                                     \
+        .tx_port  = UART5_TX_PORT,                                  \
+        .rx_port  = UART5_RX_PORT,                                  \
+        .tx_pin   = UART5_TX_PIN,                                   \
+        .rx_pin   = UART5_RX_PIN,                                   \
+    }
+#endif /* UART5_CONFIG */
+#endif /* BSP_USING_UART5 */
+
+#if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_DMA_RX_CONFIG
+#define UART5_DMA_RX_CONFIG                                         \
+    {                                                               \
+        .Instance = DMA_NOT_AVAILABLE,                              \
+    }
+#endif /* UART5_DMA_RX_CONFIG */
+#endif /* BSP_UART5_RX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

Application_SY2/drivers/include/config/usbd_config.h

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-04-10     ZYH          first version
+ * 2019-07-29     Chinese66    change from f4 to f1
+ */
+#ifndef __USBD_CONFIG_H__
+#define __USBD_CONFIG_H__
+
+#define USBD_IRQ_TYPE        USB_LP_CAN1_RX0_IRQn
+#define USBD_IRQ_HANDLER     USB_LP_CAN1_RX0_IRQHandler
+#define USBD_INSTANCE        USB
+#define USBD_PCD_SPEED       PCD_SPEED_FULL
+#define USBD_PCD_PHY_MODULE  PCD_PHY_EMBEDDED
+
+#ifndef BSP_USB_CONNECT_PIN
+#define BSP_USB_CONNECT_PIN  -1
+#endif
+
+#ifndef BSP_USB_PULL_UP_STATUS
+#define BSP_USB_PULL_UP_STATUS  1
+#endif
+#endif

Application_SY2/drivers/include/drv_common.h

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-7      SummerGift   first version
+ */
+
+#ifndef __DRV_COMMON_H__
+#define __DRV_COMMON_H__
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void _Error_Handler(char *s, int num);
+
+#ifndef Error_Handler
+#define Error_Handler() _Error_Handler(__FILE__, __LINE__)
+#endif
+
+#define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU)
+
+#define __STM32_PORT(port)  GPIO##port##_BASE
+#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

Application_SY2/drivers/include/drv_config.h

@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2018-10-30     SummerGift        first version
+ */
+ 
+#ifndef __DRV_CONFIG_H__
+#define __DRV_CONFIG_H__
+
+#include <board.h>
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(SOC_SERIES_STM32F0)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/tim_config.h"
+#include "config/pwm_config.h"
+#include "config/adc_config.h"
+#elif defined(SOC_SERIES_STM32F1)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#include "config/usbd_config.h"
+#include "config/pulse_encoder_config.h"
+#elif  defined(SOC_SERIES_STM32F2)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#elif  defined(SOC_SERIES_STM32F4)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/qspi_config.h"
+#include "config/usbd_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#include "config/pulse_encoder_config.h"
+#elif  defined(SOC_SERIES_STM32F7)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/qspi_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#elif  defined(SOC_SERIES_STM32L0)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#elif  defined(SOC_SERIES_STM32L1)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#include "config/usbd_config.h"
+#elif  defined(SOC_SERIES_STM32L4)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/qspi_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#include "config/usbd_config.h"
+#elif  defined(SOC_SERIES_STM32G0)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/pwm_config.h"
+#elif  defined(SOC_SERIES_STM32G4)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/qspi_config.h"
+#include "config/usbd_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#include "config/pulse_encoder_config.h"
+#elif  defined(SOC_SERIES_STM32H7)
+#include "config/dma_config.h"
+#include "config/uart_config.h"
+#include "config/spi_config.h"
+#include "config/qspi_config.h"
+#include "config/adc_config.h"
+#include "config/tim_config.h"
+#include "config/sdio_config.h"
+#include "config/pwm_config.h"
+#include "config/usbd_config.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

Application_SY2/drivers/include/drv_dma.h

@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-10     SummerGift   first version
+ */
+
+#ifndef __DRV_DMA_H_
+#define __DRV_DMA_H_
+
+#include <rtthread.h>
+#include <board.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L0) \
+	||defined(SOC_SERIES_STM32L1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)
+#define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef
+#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\
+	|| defined(SOC_SERIES_STM32H7)
+#define DMA_INSTANCE_TYPE              DMA_Stream_TypeDef
+#endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */
+
+struct dma_config {
+    DMA_INSTANCE_TYPE *Instance;
+    rt_uint32_t dma_rcc;
+    IRQn_Type dma_irq;
+
+#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
+    rt_uint32_t channel;
+#endif
+
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)
+    rt_uint32_t request;
+#endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__DRV_DMA_H_ */

Application_SY2/drivers/include/drv_eth.h

@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-25     zylx         first version
+ */
+
+#ifndef __DRV_ETH_H__
+#define __DRV_ETH_H__
+
+#include <rtthread.h>
+#include <rthw.h>
+#include <rtdevice.h>
+#include <board.h>
+
+/* The PHY basic control register */
+#define PHY_BASIC_CONTROL_REG       0x00U
+#define PHY_RESET_MASK              (1<<15)
+#define PHY_AUTO_NEGOTIATION_MASK   (1<<12)
+
+/* The PHY basic status register */
+#define PHY_BASIC_STATUS_REG        0x01U
+#define PHY_LINKED_STATUS_MASK      (1<<2)
+#define PHY_AUTONEGO_COMPLETE_MASK  (1<<5)
+
+/* The PHY ID one register */
+#define PHY_ID1_REG                 0x02U
+
+/* The PHY ID two register */
+#define PHY_ID2_REG                 0x03U
+
+/* The PHY auto-negotiate advertise register */
+#define PHY_AUTONEG_ADVERTISE_REG   0x04U
+
+#ifdef PHY_USING_LAN8720A
+/*  The PHY interrupt source flag register. */
+#define PHY_INTERRUPT_FLAG_REG      0x1DU
+/*  The PHY interrupt mask register. */
+#define PHY_INTERRUPT_MASK_REG      0x1EU
+#define PHY_LINK_DOWN_MASK          (1<<4)
+#define PHY_AUTO_NEGO_COMPLETE_MASK (1<<6)
+
+/*  The PHY status register. */
+#define PHY_Status_REG              0x1FU
+#define PHY_10M_MASK                (1<<2)
+#define PHY_100M_MASK               (1<<3)
+#define PHY_FULL_DUPLEX_MASK        (1<<4)
+#define PHY_Status_SPEED_10M(sr)    ((sr) & PHY_10M_MASK)
+#define PHY_Status_SPEED_100M(sr)   ((sr) & PHY_100M_MASK)
+#define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
+#endif /* PHY_USING_LAN8720A */
+
+#ifdef PHY_USING_DM9161CEP
+#define PHY_Status_REG              0x11U
+#define PHY_10M_MASK                ((1<<12) || (1<<13))
+#define PHY_100M_MASK               ((1<<14) || (1<<15))
+#define PHY_FULL_DUPLEX_MASK        ((1<<15) || (1<<13))
+#define PHY_Status_SPEED_10M(sr)    ((sr) & PHY_10M_MASK)
+#define PHY_Status_SPEED_100M(sr)   ((sr) & PHY_100M_MASK)
+#define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
+/*  The PHY interrupt source flag register. */
+#define PHY_INTERRUPT_FLAG_REG      0x15U
+/*  The PHY interrupt mask register. */
+#define PHY_INTERRUPT_MASK_REG      0x15U
+#define PHY_LINK_CHANGE_FLAG        (1<<2)
+#define PHY_LINK_CHANGE_MASK        (1<<9)
+#define PHY_INT_MASK                0
+
+#endif /* PHY_USING_DM9161CEP */
+
+#ifdef PHY_USING_DP83848C
+#define PHY_Status_REG              0x10U
+#define PHY_10M_MASK                (1<<1)
+#define PHY_FULL_DUPLEX_MASK        (1<<2)
+#define PHY_Status_SPEED_10M(sr)    ((sr) & PHY_10M_MASK)
+#define PHY_Status_SPEED_100M(sr)   (!PHY_Status_SPEED_10M(sr))
+#define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
+/*  The PHY interrupt source flag register. */
+#define PHY_INTERRUPT_FLAG_REG      0x12U
+#define PHY_LINK_CHANGE_FLAG        (1<<13)
+/*  The PHY interrupt control register. */
+#define PHY_INTERRUPT_CTRL_REG      0x11U
+#define PHY_INTERRUPT_EN            ((1<<0)|(1<<1))
+/*  The PHY interrupt mask register. */
+#define PHY_INTERRUPT_MASK_REG      0x12U
+#define PHY_INT_MASK                (1<<5)
+#endif /* PHY_USING_DP83848C */
+
+#endif /* __DRV_ETH_H__ */

Application_SY2/drivers/include/drv_flash.h

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-5      SummerGift   first version
+ */
+
+#ifndef __DRV_FLASH_H__
+#define __DRV_FLASH_H__
+
+#include <rtthread.h>
+#include "rtdevice.h"
+#include <rthw.h>
+#include <drv_common.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size);
+int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size);
+int stm32_flash_erase(rt_uint32_t addr, size_t size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* __DRV_FLASH_H__ */

Application_SY2/drivers/include/drv_log.h

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-15     SummerGift   first version
+ */
+
+/*
+ * NOTE: DO NOT include this file on the header file.
+ */
+
+#ifndef LOG_TAG
+#define DBG_TAG               "drv"
+#else
+#define DBG_TAG               LOG_TAG
+#endif /* LOG_TAG */
+
+#ifdef DRV_DEBUG
+#define DBG_LVL               DBG_LOG
+#else
+#define DBG_LVL               DBG_INFO
+#endif /* DRV_DEBUG */
+
+#include <rtdbg.h>

Application_SY2/drivers/include/drv_qspi.h

@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-27     zylx         first version
+ */
+ 
+#ifndef __DRV_QSPI_H_
+#define __DRV_QSPI_H_
+#include <rtthread.h>
+
+rt_err_t stm32_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin, rt_uint8_t data_line_width,  void (*enter_qspi_mode)(),  void (*exit_qspi_mode)());
+
+#endif

Application_SY2/drivers/include/drv_sdio.h

@@ -0,0 +1,200 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-13     BalanceTWK   first version
+ * 2019-06-11     WillianChan   Add SD card hot plug detection
+ */
+
+#ifndef _DRV_SDIO_H
+#define _DRV_SDIO_H
+#include <rtthread.h>
+#include "rtdevice.h"
+#include <rthw.h>
+#include <drv_common.h>
+#include "drv_dma.h"
+#include <string.h>
+#include <drivers/mmcsd_core.h>
+#include <drivers/sdio.h>
+
+#ifdef BSP_USING_SDIO
+
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4)
+#define SDCARD_INSTANCE_TYPE              SDIO_TypeDef
+#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
+#define SDCARD_INSTANCE_TYPE              SDMMC_TypeDef
+#endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) */
+
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4)
+#define SDCARD_INSTANCE                   SDIO
+#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7)
+#define SDCARD_INSTANCE                   SDMMC1
+#endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) */
+
+#define SDIO_BUFF_SIZE       4096
+#define SDIO_ALIGN_LEN       32
+
+#ifndef SDIO_MAX_FREQ
+#define SDIO_MAX_FREQ        (1000000)
+#endif
+
+#ifndef SDIO_BASE_ADDRESS
+#define SDIO_BASE_ADDRESS    (0x40012800U)
+#endif
+
+#ifndef SDIO_CLOCK_FREQ
+#define SDIO_CLOCK_FREQ      (48U * 1000 * 1000)
+#endif
+
+#ifndef SDIO_BUFF_SIZE
+#define SDIO_BUFF_SIZE       (4096)
+#endif
+
+#ifndef SDIO_ALIGN_LEN
+#define SDIO_ALIGN_LEN       (32)
+#endif
+
+#ifndef SDIO_MAX_FREQ
+#define SDIO_MAX_FREQ        (24 * 1000 * 1000)
+#endif
+
+#define HW_SDIO_IT_CCRCFAIL                    (0x01U << 0)
+#define HW_SDIO_IT_DCRCFAIL                    (0x01U << 1)
+#define HW_SDIO_IT_CTIMEOUT                    (0x01U << 2)
+#define HW_SDIO_IT_DTIMEOUT                    (0x01U << 3)
+#define HW_SDIO_IT_TXUNDERR                    (0x01U << 4)
+#define HW_SDIO_IT_RXOVERR                     (0x01U << 5)
+#define HW_SDIO_IT_CMDREND                     (0x01U << 6)
+#define HW_SDIO_IT_CMDSENT                     (0x01U << 7)
+#define HW_SDIO_IT_DATAEND                     (0x01U << 8)
+#define HW_SDIO_IT_STBITERR                    (0x01U << 9)
+#define HW_SDIO_IT_DBCKEND                     (0x01U << 10)
+#define HW_SDIO_IT_CMDACT                      (0x01U << 11)
+#define HW_SDIO_IT_TXACT                       (0x01U << 12)
+#define HW_SDIO_IT_RXACT                       (0x01U << 13)
+#define HW_SDIO_IT_TXFIFOHE                    (0x01U << 14)
+#define HW_SDIO_IT_RXFIFOHF                    (0x01U << 15)
+#define HW_SDIO_IT_TXFIFOF                     (0x01U << 16)
+#define HW_SDIO_IT_RXFIFOF                     (0x01U << 17)
+#define HW_SDIO_IT_TXFIFOE                     (0x01U << 18)
+#define HW_SDIO_IT_RXFIFOE                     (0x01U << 19)
+#define HW_SDIO_IT_TXDAVL                      (0x01U << 20)
+#define HW_SDIO_IT_RXDAVL                      (0x01U << 21)
+#define HW_SDIO_IT_SDIOIT                      (0x01U << 22)
+
+#define HW_SDIO_ERRORS \
+    (HW_SDIO_IT_CCRCFAIL | HW_SDIO_IT_CTIMEOUT | \
+     HW_SDIO_IT_DCRCFAIL | HW_SDIO_IT_DTIMEOUT | \
+     HW_SDIO_IT_RXOVERR  | HW_SDIO_IT_TXUNDERR)
+
+#define HW_SDIO_POWER_OFF                      (0x00U)
+#define HW_SDIO_POWER_UP                       (0x02U)
+#define HW_SDIO_POWER_ON                       (0x03U)
+
+#define HW_SDIO_FLOW_ENABLE                    (0x01U << 14)
+#define HW_SDIO_BUSWIDE_1B                     (0x00U << 11)
+#define HW_SDIO_BUSWIDE_4B                     (0x01U << 11)
+#define HW_SDIO_BUSWIDE_8B                     (0x02U << 11)
+#define HW_SDIO_BYPASS_ENABLE                  (0x01U << 10)
+#define HW_SDIO_IDLE_ENABLE                    (0x01U << 9)
+#define HW_SDIO_CLK_ENABLE                     (0x01U << 8)
+
+#define HW_SDIO_SUSPEND_CMD                    (0x01U << 11)
+#define HW_SDIO_CPSM_ENABLE                    (0x01U << 10)
+#define HW_SDIO_WAIT_END                       (0x01U << 9)
+#define HW_SDIO_WAIT_INT                       (0x01U << 8)
+#define HW_SDIO_RESPONSE_NO                    (0x00U << 6)
+#define HW_SDIO_RESPONSE_SHORT                 (0x01U << 6)
+#define HW_SDIO_RESPONSE_LONG                  (0x03U << 6)
+
+#define HW_SDIO_DATA_LEN_MASK                  (0x01FFFFFFU)
+
+#define HW_SDIO_IO_ENABLE                      (0x01U << 11)
+#define HW_SDIO_RWMOD_CK                       (0x01U << 10)
+#define HW_SDIO_RWSTOP_ENABLE                  (0x01U << 9)
+#define HW_SDIO_RWSTART_ENABLE                 (0x01U << 8)
+#define HW_SDIO_DBLOCKSIZE_1                   (0x00U << 4)
+#define HW_SDIO_DBLOCKSIZE_2                   (0x01U << 4)
+#define HW_SDIO_DBLOCKSIZE_4                   (0x02U << 4)
+#define HW_SDIO_DBLOCKSIZE_8                   (0x03U << 4)
+#define HW_SDIO_DBLOCKSIZE_16                  (0x04U << 4)
+#define HW_SDIO_DBLOCKSIZE_32                  (0x05U << 4)
+#define HW_SDIO_DBLOCKSIZE_64                  (0x06U << 4)
+#define HW_SDIO_DBLOCKSIZE_128                 (0x07U << 4)
+#define HW_SDIO_DBLOCKSIZE_256                 (0x08U << 4)
+#define HW_SDIO_DBLOCKSIZE_512                 (0x09U << 4)
+#define HW_SDIO_DBLOCKSIZE_1024                (0x0AU << 4)
+#define HW_SDIO_DBLOCKSIZE_2048                (0x0BU << 4)
+#define HW_SDIO_DBLOCKSIZE_4096                (0x0CU << 4)
+#define HW_SDIO_DBLOCKSIZE_8192                (0x0DU << 4)
+#define HW_SDIO_DBLOCKSIZE_16384               (0x0EU << 4)
+#define HW_SDIO_DMA_ENABLE                     (0x01U << 3)
+#define HW_SDIO_STREAM_ENABLE                  (0x01U << 2)
+#define HW_SDIO_TO_HOST                        (0x01U << 1)
+#define HW_SDIO_DPSM_ENABLE                    (0x01U << 0)
+
+#define HW_SDIO_DATATIMEOUT                    (0xF0000000U)
+
+struct stm32_sdio
+{
+    volatile rt_uint32_t power;
+    volatile rt_uint32_t clkcr;
+    volatile rt_uint32_t arg;
+    volatile rt_uint32_t cmd;
+    volatile rt_uint32_t respcmd;
+    volatile rt_uint32_t resp1;
+    volatile rt_uint32_t resp2;
+    volatile rt_uint32_t resp3;
+    volatile rt_uint32_t resp4;
+    volatile rt_uint32_t dtimer;
+    volatile rt_uint32_t dlen;
+    volatile rt_uint32_t dctrl;
+    volatile rt_uint32_t dcount;
+    volatile rt_uint32_t sta;
+    volatile rt_uint32_t icr;
+    volatile rt_uint32_t mask;
+    volatile rt_uint32_t reserved0[2];
+    volatile rt_uint32_t fifocnt;
+    volatile rt_uint32_t reserved1[13];
+    volatile rt_uint32_t fifo;
+};
+
+typedef rt_err_t (*dma_txconfig)(rt_uint32_t *src, rt_uint32_t *dst, int size);
+typedef rt_err_t (*dma_rxconfig)(rt_uint32_t *src, rt_uint32_t *dst, int size);
+typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio);
+
+struct stm32_sdio_des
+{
+    struct stm32_sdio *hw_sdio;
+    dma_txconfig txconfig;
+    dma_rxconfig rxconfig;
+    sdio_clk_get clk_get;
+};
+
+struct stm32_sdio_config
+{
+    SDCARD_INSTANCE_TYPE *Instance;
+    struct dma_config dma_rx, dma_tx;
+};
+
+/* stm32 sdio dirver class */
+struct stm32_sdio_class
+{
+    struct stm32_sdio_des *des;
+    const struct stm32_sdio_config *cfg;
+    struct rt_mmcsd_host host;
+    struct
+    {
+        DMA_HandleTypeDef handle_rx;
+        DMA_HandleTypeDef handle_tx;
+    } dma;
+};
+
+extern void stm32_mmcsd_change(void);
+
+#endif
+
+#endif /* BSP_USING_SDIO */

Application_SY2/drivers/include/drv_soft_i2c.h

@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-08     balanceTWK   first version
+ */
+
+#ifndef __DRV_I2C__
+#define __DRV_I2C__
+
+#include <rtthread.h>
+#include <rthw.h>
+#include <rtdevice.h>
+
+#ifdef RT_USING_I2C
+
+/* stm32 config class */
+struct stm32_soft_i2c_config
+{
+    rt_uint8_t scl;
+    rt_uint8_t sda;
+    const char *bus_name;
+};
+/* stm32 i2c dirver class */
+struct stm32_i2c
+{
+    struct rt_i2c_bit_ops ops;
+    struct rt_i2c_bus_device i2c2_bus;
+};
+
+#ifdef BSP_USING_I2C1
+#define I2C1_BUS_CONFIG                                  \
+    {                                                    \
+        .scl = BSP_I2C1_SCL_PIN,                         \
+        .sda = BSP_I2C1_SDA_PIN,                         \
+        .bus_name = "i2c1",                              \
+    }
+#endif
+    
+#ifdef BSP_USING_I2C2
+#define I2C2_BUS_CONFIG                                  \
+    {                                                    \
+        .scl = BSP_I2C2_SCL_PIN,                         \
+        .sda = BSP_I2C2_SDA_PIN,                         \
+        .bus_name = "i2c2",                              \
+    }
+#endif
+    
+#ifdef BSP_USING_I2C3
+#define I2C3_BUS_CONFIG                                  \
+    {                                                    \
+        .scl = BSP_I2C3_SCL_PIN,                         \
+        .sda = BSP_I2C3_SDA_PIN,                         \
+        .bus_name = "i2c3",                              \
+    }
+#endif
+		
+#ifdef BSP_USING_I2C4
+#define I2C4_BUS_CONFIG                                  \
+    {                                                    \
+        .scl = BSP_I2C4_SCL_PIN,                         \
+        .sda = BSP_I2C4_SDA_PIN,                         \
+        .bus_name = "i2c4",                              \
+    }
+#endif
+int rt_hw_i2c_init(void);
+
+#endif
+
+#endif /* RT_USING_I2C */

Application_SY2/drivers/include/drv_spi.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-5      SummerGift   first version
+ */
+
+#ifndef __DRV_SPI_H_
+#define __DRV_SPI_H_
+
+#include <rtthread.h>
+#include "rtdevice.h"
+#include <rthw.h>
+#include <drv_common.h>
+#include "drv_dma.h"
+
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, GPIO_TypeDef* cs_gpiox, uint16_t cs_gpio_pin);
+
+struct stm32_hw_spi_cs
+{
+    GPIO_TypeDef* GPIOx;
+    uint16_t GPIO_Pin;
+};
+
+struct stm32_spi_config
+{
+    SPI_TypeDef *Instance;
+    char *bus_name;
+    struct dma_config *dma_rx, *dma_tx;
+};
+
+struct stm32_spi_device
+{
+    rt_uint32_t pin;
+    char *bus_name;
+    char *device_name;
+};
+
+#define SPI_USING_RX_DMA_FLAG   (1<<0)
+#define SPI_USING_TX_DMA_FLAG   (1<<1)
+
+/* stm32 spi dirver class */
+struct stm32_spi
+{
+    SPI_HandleTypeDef handle;
+    struct stm32_spi_config *config;
+    struct rt_spi_configuration *cfg;
+
+    struct
+    {
+        DMA_HandleTypeDef handle_rx;
+        DMA_HandleTypeDef handle_tx;
+    } dma;
+    
+    rt_uint8_t spi_dma_flag;
+    struct rt_spi_bus spi_bus;
+};
+
+#endif /*__DRV_SPI_H_ */

Application_SY2/drivers/include/drv_usbh.h

@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2017-12-12     ZYH               the first version
+ * 2019-12-19     tyustli           port to stm32 series
+ */
+#ifndef __DRV_USBH_H__
+#define __DRV_USBH_H__
+#include <rtthread.h>
+
+#define OTG_FS_PORT 1
+
+int stm_usbh_register(void);
+
+#endif
+
+/************* end of file ************/

Application_SY2/drivers/stm32f1xx_hal_conf.h

@@ -0,0 +1,375 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_conf.h
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_CONF_H
+#define __STM32F1xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver 
+  */
+  
+#define HAL_MODULE_ENABLED  
+/*#define HAL_ADC_MODULE_ENABLED   */
+/*#define HAL_CRYP_MODULE_ENABLED   */
+/*#define HAL_CAN_MODULE_ENABLED   */
+/*#define HAL_CEC_MODULE_ENABLED   */
+/*#define HAL_CORTEX_MODULE_ENABLED   */
+/*#define HAL_CRC_MODULE_ENABLED   */
+/*#define HAL_DAC_MODULE_ENABLED   */
+/*#define HAL_DMA_MODULE_ENABLED   */
+/*#define HAL_ETH_MODULE_ENABLED   */
+/*#define HAL_FLASH_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+/*#define HAL_I2C_MODULE_ENABLED   */
+/*#define HAL_I2S_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED   */
+/*#define HAL_IWDG_MODULE_ENABLED   */
+/*#define HAL_NOR_MODULE_ENABLED   */
+/*#define HAL_NAND_MODULE_ENABLED   */
+/*#define HAL_PCCARD_MODULE_ENABLED   */
+/*#define HAL_PCD_MODULE_ENABLED   */
+/*#define HAL_HCD_MODULE_ENABLED   */
+/*#define HAL_PWR_MODULE_ENABLED   */
+/*#define HAL_RCC_MODULE_ENABLED   */
+#define HAL_RTC_MODULE_ENABLED
+/*#define HAL_SD_MODULE_ENABLED   */
+/*#define HAL_MMC_MODULE_ENABLED   */
+/*#define HAL_SDRAM_MODULE_ENABLED   */
+/*#define HAL_SMARTCARD_MODULE_ENABLED   */
+/*#define HAL_SPI_MODULE_ENABLED   */
+/*#define HAL_SRAM_MODULE_ENABLED   */
+/*#define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED   */
+/*#define HAL_WWDG_MODULE_ENABLED   */
+/*#define HAL_EXTI_MODULE_ENABLED   */
+
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_IWDG_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).  
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL). 
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE               40000U    /*!< LSI Typical Value in Hz */
+#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
+                                                The real value may vary depending on the variations
+                                                in voltage and temperature. */
+
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */     
+#define  VDD_VALUE                    ((uint32_t)3300) /*!< Value of VDD in mv */           
+#define  TICK_INT_PRIORITY            ((uint32_t)0)    /*!< tick interrupt priority (lowest by default)  */            
+#define  USE_RTOS                     0
+#define  PREFETCH_ENABLE              1
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2
+#define MAC_ADDR1   0
+#define MAC_ADDR2   0
+#define MAC_ADDR3   0
+#define MAC_ADDR4   0
+#define MAC_ADDR5   0
+
+/* Definition of the Ethernet driver buffers size and count */   
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    ((uint32_t)8)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    ((uint32_t)4)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848_PHY_ADDRESS Address*/ 
+#define DP83848_PHY_ADDRESS           0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+#define PHY_RESET_DELAY                 ((uint32_t)0x000000FF)
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
+
+#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
+#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
+ 
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+  
+/* Section 4: Extended PHY Registers */
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
+
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file 
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32f1xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32f1xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32f1xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+   
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f1xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+   
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f1xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */  
+   
+#ifdef HAL_CAN_MODULE_ENABLED
+ #include "stm32f1xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f1xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32f1xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32f1xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32f1xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32f1xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32f1xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32f1xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32f1xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f1xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f1xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f1xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f1xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f1xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+ #include "stm32f1xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f1xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */  
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f1xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+ #include "stm32f1xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */     
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f1xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f1xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f1xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f1xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f1xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f1xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f1xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f1xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f1xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */   
+   
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed. 
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/